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Commit 10fb1d73 authored May 25, 2018 by Deepak Katragadda Committed by Gerrit - the friendly Code Review server Jun 04, 2018

clk: qcom: Add clock driver support for SM8150 v2



Pull in the changes to the frequency plan for the peripheral,
camera, display, NPU and video clocks between the two versions
of SM8150.

Change-Id: I90d8fa548d95daeb879b00919b212570bc2e3ea4
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>

parent c5e9ba26

Documentation/devicetree/bindings/clock/qcom,camcc.txt

+2 −1

Original line number	Diff line number	Diff line
		@@ -2,7 +2,8 @@ Qualcomm Technologies, Inc. Camera Clock & Reset Controller Binding
		-------------------------------------------------------------------

		Required properties :
		- compatible : must contain "qcom,camcc-sm8150" or "qcom,camcc-sdmshrike".
		- compatible : must contain "qcom,camcc-sm8150", "qcom,camcc-sm8150-v2"
		or "qcom,camcc-sdmshrike".
		- reg : shall contain base register location and length.
		- reg-names: names of registers listed in the same order as in
		the reg property.

Documentation/devicetree/bindings/clock/qcom,dispcc.txt

+1 −1

Original line number	Diff line number	Diff line
		@@ -2,7 +2,7 @@ Qualcomm Technologies, Inc. Display Clock & Reset Controller Binding
		--------------------------------------------------------------------

		Required properties :
		- compatible : Shall contain "qcom,dispcc-sm8150".
		- compatible : Shall contain "qcom,dispcc-sm8150" or "qcom,dispcc-sm8150-v2".
		- reg : Shall contain base register location and length.
		- reg-names: Address name. Must be "cc_base".
		- vdd_mm-supply: phandle to the MM_CX rail that needs to be voted on behalf

Documentation/devicetree/bindings/clock/qcom,gcc.txt

+1 −0

Original line number	Diff line number	Diff line
		@@ -19,6 +19,7 @@ Required properties :
		"qcom,gcc-msm8996"
		"qcom,gcc-mdm9615"
		"qcom,gcc-sm8150"
		"qcom,gcc-sm8150-v2"
		"qcom,gcc-sdmshrike"
		"qcom,gcc-qcs405"
		"qcom,gcc-mdss-qcs405"

Documentation/devicetree/bindings/clock/qcom,npucc.txt

+1 −1

Original line number	Diff line number	Diff line
		@@ -2,7 +2,7 @@ Qualcomm Technologies, Inc. NPU Clock & Reset Controller Binding
		----------------------------------------------------------------

		Required properties :
		- compatible : must contain "qcom,npucc-sm8150".
		- compatible : must contain "qcom,npucc-sm8150" or "qcom,npucc-sm8150-v2".
		- reg : shall contain base register location and length.
		- reg-names: names of registers listed in the same order as in
		the reg property.

Documentation/devicetree/bindings/clock/qcom,videocc.txt

+1 −1

Original line number	Diff line number	Diff line
		Qualcomm Technologies, Inc. Video Clock & Reset Controller Bindings

		Required properties:
		- compatible: shall contain "qcom,videocc-sm8150".
		- compatible: shall contain "qcom,videocc-sm8150" or "qcom,videocc-sm8150-v2".
		- reg: shall contain base register location and length.
		- reg-names: names of registers listed in the same order as in the reg property.
		- vdd_mm-supply: the logic rail supply.