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Commit 105d8ebb authored by David Dai's avatar David Dai
Browse files

clk: add bus voting ops for debug purposes 



Add bandwidth voting for clk_summary, clk_show and clk_print_regs
to allow access to the config space of certain multimedia clock
controllers including display, camera, and video.

Change-Id: Ia7b8820cd3fc972caf87530a3105b6c90f37e7c5
Signed-off-by: default avatarDavid Dai <daidavid1@codeaurora.org>
parent 1cef27dd

drivers/clk/clk.c

+26 −0
Original line number Original line Diff line number Diff line
@@ -2594,10 +2594,14 @@ static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c, 
	if (!c)

	if (!c)

		return;

		return;





	if (c->ops->bus_vote)

		c->ops->bus_vote(c->hw, true);

	clk_summary_show_one(s, c, level);

	clk_summary_show_one(s, c, level);





	hlist_for_each_entry(child, &c->children, child_node)

	hlist_for_each_entry(child, &c->children, child_node)

		clk_summary_show_subtree(s, child, level + 1);

		clk_summary_show_subtree(s, child, level + 1);

	if (c->ops->bus_vote)

		c->ops->bus_vote(c->hw, false);

}

}





static int clk_summary_show(struct seq_file *s, void *data)

static int clk_summary_show(struct seq_file *s, void *data)
@@ -2656,6 +2660,9 @@ static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level) 
	if (!c)

	if (!c)

		return;

		return;





	if (c->ops->bus_vote)

		c->ops->bus_vote(c->hw, true);



	clk_dump_one(s, c, level);

	clk_dump_one(s, c, level);





	hlist_for_each_entry(child, &c->children, child_node) {

	hlist_for_each_entry(child, &c->children, child_node) {
@@ -2664,6 +2671,9 @@ static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level) 
	}

	}





	seq_putc(s, '}');

	seq_putc(s, '}');



	if (c->ops->bus_vote)

		c->ops->bus_vote(c->hw, false);

}

}





static int clk_dump(struct seq_file *s, void *data)

static int clk_dump(struct seq_file *s, void *data)
@@ -2925,7 +2935,15 @@ void clk_debug_print_hw(struct clk_core *clk, struct seq_file *f) 
	if (!clk->ops->list_registers)

	if (!clk->ops->list_registers)

		return;

		return;





	clk_prepare_lock();

	if (clk->ops->bus_vote)

		clk->ops->bus_vote(clk->hw, true);



	clk->ops->list_registers(f, clk->hw);

	clk->ops->list_registers(f, clk->hw);



	if (clk->ops->bus_vote)

		clk->ops->bus_vote(clk->hw, false);

	clk_prepare_unlock();

}

}

EXPORT_SYMBOL(clk_debug_print_hw);

EXPORT_SYMBOL(clk_debug_print_hw);
@@ -2933,8 +2951,16 @@ static int print_hw_show(struct seq_file *m, void *unused) 
{

{

	struct clk_core *c = m->private;

	struct clk_core *c = m->private;





	clk_prepare_lock();

	if (c->ops->bus_vote)

		c->ops->bus_vote(c->hw, true);



	clk_debug_print_hw(c, m);

	clk_debug_print_hw(c, m);





	if (c->ops->bus_vote)

		c->ops->bus_vote(c->hw, false);

	clk_prepare_unlock();



	return 0;

	return 0;

}

}

include/linux/clk-provider.h

+6 −0
Original line number Original line Diff line number Diff line
@@ -216,6 +216,9 @@ struct clk_duty { 
 *		clock that is below rate_max. Return -ENXIO in case there is

 *		clock that is below rate_max. Return -ENXIO in case there is

 *		no frequency table.

 *		no frequency table.

 *

 *

 * @bus_vote:	Votes for bandwidth on certain config slaves to connect

 *		ports in order to gain access to clock controllers.

 *

 * The clk_enable/clk_disable and clk_prepare/clk_unprepare pairs allow

 * The clk_enable/clk_disable and clk_prepare/clk_unprepare pairs allow

 * implementations to split any work between atomic (enable) and sleepable

 * implementations to split any work between atomic (enable) and sleepable

 * (prepare) contexts.  If enabling a clock requires code that might sleep,

 * (prepare) contexts.  If enabling a clock requires code that might sleep,
@@ -264,6 +267,7 @@ struct clk_ops { 
							struct clk_hw *hw);

							struct clk_hw *hw);

	long		(*list_rate)(struct clk_hw *hw, unsigned int n,

	long		(*list_rate)(struct clk_hw *hw, unsigned int n,

							unsigned long rate_max);

							unsigned long rate_max);

	void		(*bus_vote)(struct clk_hw *hw, bool enable);

};

};





/**

/**
@@ -278,6 +282,7 @@ struct clk_ops { 
 * @vdd_class: voltage scaling requirement class

 * @vdd_class: voltage scaling requirement class

 * @rate_max: maximum clock rate in Hz supported at each voltage level

 * @rate_max: maximum clock rate in Hz supported at each voltage level

 * @num_rate_max: number of maximum voltage level supported

 * @num_rate_max: number of maximum voltage level supported

 * @bus_cl_id: client id registered with the bus driver used for bw votes

 */

 */

struct clk_init_data {

struct clk_init_data {

	const char		*name;

	const char		*name;
@@ -288,6 +293,7 @@ struct clk_init_data { 
	struct clk_vdd_class	*vdd_class;

	struct clk_vdd_class	*vdd_class;

	unsigned long		*rate_max;

	unsigned long		*rate_max;

	int			num_rate_max;

	int			num_rate_max;

	unsigned int		bus_cl_id;

};

};





struct regulator;

struct regulator;