Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 0fa2bfcd authored by Wei Ni's avatar Wei Ni Committed by Zhang Rui
Browse files

arm64: tegra: use tegra132-soctherm for Tegra132



The Tegra132 has the specific settings for soctherm,
so change to use campatible "nvidia,tegra132-soctherm" for it.
And adds cpu, gpu, mem and pllx thermal zones.

Signed-off-by: default avatarWei Ni <wni@nvidia.com>
Signed-off-by: default avatarZhang Rui <rui.zhang@intel.com>
parent e12b048c
Loading
Loading
Loading
Loading
+34 −2
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/tegra124-soctherm.h>

/ {
	compatible = "nvidia,tegra132", "nvidia,tegra124";
@@ -727,8 +728,8 @@
	};

	soctherm: thermal-sensor@700e2000 {
		compatible = "nvidia,tegra124-soctherm";
		reg = <0x0 0x700e2000 0x0 0x1000>;
		compatible = "nvidia,tegra132-soctherm";
		reg = <0x0 0x700e2000 0x0 0x600>;
		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
			<&tegra_car TEGRA124_CLK_SOC_THERM>;
@@ -738,6 +739,37 @@
		#thermal-sensor-cells = <1>;
	};

	thermal-zones {
		cpu {
			polling-delay-passive = <1000>;
			polling-delay = <0>;

			thermal-sensors =
				<&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>;
		};
		mem {
			polling-delay-passive = <0>;
			polling-delay = <0>;

			thermal-sensors =
				<&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>;
		};
		gpu {
			polling-delay-passive = <1000>;
			polling-delay = <0>;

			thermal-sensors =
				<&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>;
		};
		pllx {
			polling-delay-passive = <0>;
			polling-delay = <0>;

			thermal-sensors =
				<&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>;
		};
	};

	ahub@70300000 {
		compatible = "nvidia,tegra124-ahub";
		reg = <0x0 0x70300000 0x0 0x200>,