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Commit 0f230ca9 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'mlxsw-tc-flower-offload-stats' 



Jiri Pirko says:

====================
mlxsw: Add support for TC flower offload statistics

Arkadi says:
This patchset adds support for retrieving TC flower statistics for
offloaded rules, which includes packets count, bytes count and last used
time stamp. Currently The statistics are gathered on a per-rule basis.

This patchset also includes generic allocator for counters.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 27303fcf 7c1b8eb1

drivers/net/ethernet/mellanox/mlxsw/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -15,7 +15,8 @@ obj-$(CONFIG_MLXSW_SPECTRUM) += mlxsw_spectrum.o 
mlxsw_spectrum-objs		:= spectrum.o spectrum_buffers.o \

				   spectrum_switchdev.o spectrum_router.o \

				   spectrum_kvdl.o spectrum_acl_tcam.o \

				   spectrum_acl.o spectrum_flower.o

				   spectrum_acl.o spectrum_flower.o \

				   spectrum_cnt.o

mlxsw_spectrum-$(CONFIG_MLXSW_SPECTRUM_DCB)	+= spectrum_dcb.o

obj-$(CONFIG_MLXSW_MINIMAL)	+= mlxsw_minimal.o

mlxsw_minimal-objs		:= minimal.o

drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_actions.c

+51 −0
Original line number Diff line number Diff line
@@ -760,3 +760,54 @@ int mlxsw_afa_block_append_fwd(struct mlxsw_afa_block *block, 
	return err;

}

EXPORT_SYMBOL(mlxsw_afa_block_append_fwd);



/* Policing and Counting Action

 * ----------------------------

 * Policing and Counting action is used for binding policer and counter

 * to ACL rules.

 */



#define MLXSW_AFA_POLCNT_CODE 0x08

#define MLXSW_AFA_POLCNT_SIZE 1



enum mlxsw_afa_polcnt_counter_set_type {

	/* No count */

	MLXSW_AFA_POLCNT_COUNTER_SET_TYPE_NO_COUNT = 0x00,

	/* Count packets and bytes */

	MLXSW_AFA_POLCNT_COUNTER_SET_TYPE_PACKETS_BYTES = 0x03,

	/* Count only packets */

	MLXSW_AFA_POLCNT_COUNTER_SET_TYPE_PACKETS = 0x05,

};



/* afa_polcnt_counter_set_type

 * Counter set type for flow counters.

 */

MLXSW_ITEM32(afa, polcnt, counter_set_type, 0x04, 24, 8);



/* afa_polcnt_counter_index

 * Counter index for flow counters.

 */

MLXSW_ITEM32(afa, polcnt, counter_index, 0x04, 0, 24);



static inline void

mlxsw_afa_polcnt_pack(char *payload,

		      enum mlxsw_afa_polcnt_counter_set_type set_type,

		      u32 counter_index)

{

	mlxsw_afa_polcnt_counter_set_type_set(payload, set_type);

	mlxsw_afa_polcnt_counter_index_set(payload, counter_index);

}



int mlxsw_afa_block_append_counter(struct mlxsw_afa_block *block,

				   u32 counter_index)

{

	char *act = mlxsw_afa_block_append_action(block,

						  MLXSW_AFA_POLCNT_CODE,

						  MLXSW_AFA_POLCNT_SIZE);

	if (!act)

		return -ENOBUFS;

	mlxsw_afa_polcnt_pack(act, MLXSW_AFA_POLCNT_COUNTER_SET_TYPE_PACKETS_BYTES,

			      counter_index);

	return 0;

}

EXPORT_SYMBOL(mlxsw_afa_block_append_counter);

drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_actions.h

+2 −0
Original line number Diff line number Diff line
@@ -64,5 +64,7 @@ int mlxsw_afa_block_append_fwd(struct mlxsw_afa_block *block, 
			       u8 local_port, bool in_port);

int mlxsw_afa_block_append_vlan_modify(struct mlxsw_afa_block *block,

				       u16 vid, u8 pcp, u8 et);

int mlxsw_afa_block_append_counter(struct mlxsw_afa_block *block,

				   u32 counter_index);



#endif

drivers/net/ethernet/mellanox/mlxsw/reg.h

+65 −0
Original line number Diff line number Diff line
@@ -5506,6 +5506,70 @@ static inline void mlxsw_reg_mpsc_pack(char *payload, u8 local_port, bool e, 
	mlxsw_reg_mpsc_rate_set(payload, rate);

}



/* MGPC - Monitoring General Purpose Counter Set Register

 * The MGPC register retrieves and sets the General Purpose Counter Set.

 */

#define MLXSW_REG_MGPC_ID 0x9081

#define MLXSW_REG_MGPC_LEN 0x18



MLXSW_REG_DEFINE(mgpc, MLXSW_REG_MGPC_ID, MLXSW_REG_MGPC_LEN);



enum mlxsw_reg_mgpc_counter_set_type {

	/* No count */

	MLXSW_REG_MGPC_COUNTER_SET_TYPE_NO_COUT = 0x00,

	/* Count packets and bytes */

	MLXSW_REG_MGPC_COUNTER_SET_TYPE_PACKETS_BYTES = 0x03,

	/* Count only packets */

	MLXSW_REG_MGPC_COUNTER_SET_TYPE_PACKETS = 0x05,

};



/* reg_mgpc_counter_set_type

 * Counter set type.

 * Access: OP

 */

MLXSW_ITEM32(reg, mgpc, counter_set_type, 0x00, 24, 8);



/* reg_mgpc_counter_index

 * Counter index.

 * Access: Index

 */

MLXSW_ITEM32(reg, mgpc, counter_index, 0x00, 0, 24);



enum mlxsw_reg_mgpc_opcode {

	/* Nop */

	MLXSW_REG_MGPC_OPCODE_NOP = 0x00,

	/* Clear counters */

	MLXSW_REG_MGPC_OPCODE_CLEAR = 0x08,

};



/* reg_mgpc_opcode

 * Opcode.

 * Access: OP

 */

MLXSW_ITEM32(reg, mgpc, opcode, 0x04, 28, 4);



/* reg_mgpc_byte_counter

 * Byte counter value.

 * Access: RW

 */

MLXSW_ITEM64(reg, mgpc, byte_counter, 0x08, 0, 64);



/* reg_mgpc_packet_counter

 * Packet counter value.

 * Access: RW

 */

MLXSW_ITEM64(reg, mgpc, packet_counter, 0x10, 0, 64);



static inline void mlxsw_reg_mgpc_pack(char *payload, u32 counter_index,

				       enum mlxsw_reg_mgpc_opcode opcode,

				       enum mlxsw_reg_mgpc_counter_set_type set_type)

{

	MLXSW_REG_ZERO(mgpc, payload);

	mlxsw_reg_mgpc_counter_index_set(payload, counter_index);

	mlxsw_reg_mgpc_counter_set_type_set(payload, set_type);

	mlxsw_reg_mgpc_opcode_set(payload, opcode);

}



/* SBPR - Shared Buffer Pools Register

 * -----------------------------------

 * The SBPR configures and retrieves the shared buffer pools and configuration.
@@ -5979,6 +6043,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = { 
	MLXSW_REG(mpar),

	MLXSW_REG(mlcr),

	MLXSW_REG(mpsc),

	MLXSW_REG(mgpc),

	MLXSW_REG(sbpr),

	MLXSW_REG(sbcm),

	MLXSW_REG(sbpm),

drivers/net/ethernet/mellanox/mlxsw/resources.h

+4 −0
Original line number Diff line number Diff line
@@ -43,7 +43,9 @@ enum mlxsw_res_id { 
	MLXSW_RES_ID_KVD_SINGLE_MIN_SIZE,

	MLXSW_RES_ID_KVD_DOUBLE_MIN_SIZE,

	MLXSW_RES_ID_MAX_TRAP_GROUPS,

	MLXSW_RES_ID_COUNTER_POOL_SIZE,

	MLXSW_RES_ID_MAX_SPAN,

	MLXSW_RES_ID_COUNTER_SIZE_PACKETS_BYTES,

	MLXSW_RES_ID_MAX_SYSTEM_PORT,

	MLXSW_RES_ID_MAX_LAG,

	MLXSW_RES_ID_MAX_LAG_MEMBERS,
@@ -75,7 +77,9 @@ static u16 mlxsw_res_ids[] = { 
	[MLXSW_RES_ID_KVD_SINGLE_MIN_SIZE] = 0x1002,

	[MLXSW_RES_ID_KVD_DOUBLE_MIN_SIZE] = 0x1003,

	[MLXSW_RES_ID_MAX_TRAP_GROUPS] = 0x2201,

	[MLXSW_RES_ID_COUNTER_POOL_SIZE] = 0x2410,

	[MLXSW_RES_ID_MAX_SPAN] = 0x2420,

	[MLXSW_RES_ID_COUNTER_SIZE_PACKETS_BYTES] = 0x2443,

	[MLXSW_RES_ID_MAX_SYSTEM_PORT] = 0x2502,

	[MLXSW_RES_ID_MAX_LAG] = 0x2520,

	[MLXSW_RES_ID_MAX_LAG_MEMBERS] = 0x2521,