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Commit 0eaf5b9a authored by Guru Das Srinagesh's avatar Guru Das Srinagesh
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power: smb5: Fix incorrect QC2.0 pulse count enum values



Currently, the enums HVDCP_PULSE_COUNT_MAX_QC2_* are written as-is to the
HVDCP_PULSE_COUNT_MAX register without taking into account their bitmask
in the register. That is, for example, 0x01 is being written to the
register instead of (0x01 << 6), which is clearly incorrect.

Fix this by assigning the correct values to each of the enums.

Change-Id: I388c05b2756dcca5442c6fd7d016a45c97330fee
Signed-off-by: default avatarGuru Das Srinagesh <gurus@codeaurora.org>
parent cbf2565c
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+4 −4
Original line number Diff line number Diff line
@@ -225,10 +225,10 @@ enum {
#define HVDCP_PULSE_COUNT_MAX_REG              (USBIN_BASE + 0x5B)
#define HVDCP_PULSE_COUNT_MAX_QC2_MASK         GENMASK(7, 6)
enum {
	HVDCP_PULSE_COUNT_MAX_QC2_5V,
	HVDCP_PULSE_COUNT_MAX_QC2_9V,
	HVDCP_PULSE_COUNT_MAX_QC2_12V,
	HVDCP_PULSE_COUNT_MAX_QC2_INVALID
	HVDCP_PULSE_COUNT_MAX_QC2_5V = 0,
	HVDCP_PULSE_COUNT_MAX_QC2_9V = 0x40,
	HVDCP_PULSE_COUNT_MAX_QC2_12V = 0x80,
	HVDCP_PULSE_COUNT_MAX_QC2_INVALID = 0xC0
};

#define USBIN_ADAPTER_ALLOW_CFG_REG		(USBIN_BASE + 0x60)