Loading arch/arm64/boot/dts/qcom/trinket.dtsi +53 −0 Original line number Diff line number Diff line Loading @@ -1668,6 +1668,59 @@ qcom,client-id = <0x00000001>; }; qcom_cedev: qcedev@1b20000 { compatible = "qcom,qcedev"; reg = <0x1b20000 0x20000>, <0x1b04000 0x24000>; reg-names = "crypto-base","crypto-bam-base"; interrupts = <0 247 0>; qcom,bam-pipe-pair = <3>; qcom,ce-hw-instance = <0>; qcom,ce-device = <0>; qcom,ce-hw-shared; qcom,bam-ee = <0>; qcom,msm-bus,name = "qcedev-noc"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <125 512 0 0>, <125 512 393600 393600>; qcom,smmu-s1-enable; qcom,no-clock-support; iommus = <&apps_smmu 0x01A6 0x0011>, <&apps_smmu 0x01B6 0x0011>; }; qcom_crypto: qcrypto@1b20000 { compatible = "qcom,qcrypto"; reg = <0x1b20000 0x20000>, <0x1b04000 0x24000>; reg-names = "crypto-base","crypto-bam-base"; interrupts = <0 247 0>; qcom,bam-pipe-pair = <2>; qcom,ce-hw-instance = <0>; qcom,ce-device = <0>; qcom,bam-ee = <0>; qcom,ce-hw-shared; qcom,clk-mgmt-sus-res; qcom,msm-bus,name = "qcrypto-noc"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <125 512 0 0>, <125 512 393600 393600>; qcom,use-sw-aes-cbc-ecb-ctr-algo; qcom,use-sw-aes-xts-algo; qcom,use-sw-aes-ccm-algo; qcom,use-sw-ahash-algo; qcom,use-sw-aead-algo; qcom,use-sw-hmac-algo; qcom,smmu-s1-enable; qcom,no-clock-support; iommus = <&apps_smmu 0x01A4 0x0011>, <&apps_smmu 0x01B4 0x0011>; }; slim_aud: slim@a2c0000 { cell-index = <1>; compatible = "qcom,slim-ngd"; Loading Loading
arch/arm64/boot/dts/qcom/trinket.dtsi +53 −0 Original line number Diff line number Diff line Loading @@ -1668,6 +1668,59 @@ qcom,client-id = <0x00000001>; }; qcom_cedev: qcedev@1b20000 { compatible = "qcom,qcedev"; reg = <0x1b20000 0x20000>, <0x1b04000 0x24000>; reg-names = "crypto-base","crypto-bam-base"; interrupts = <0 247 0>; qcom,bam-pipe-pair = <3>; qcom,ce-hw-instance = <0>; qcom,ce-device = <0>; qcom,ce-hw-shared; qcom,bam-ee = <0>; qcom,msm-bus,name = "qcedev-noc"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <125 512 0 0>, <125 512 393600 393600>; qcom,smmu-s1-enable; qcom,no-clock-support; iommus = <&apps_smmu 0x01A6 0x0011>, <&apps_smmu 0x01B6 0x0011>; }; qcom_crypto: qcrypto@1b20000 { compatible = "qcom,qcrypto"; reg = <0x1b20000 0x20000>, <0x1b04000 0x24000>; reg-names = "crypto-base","crypto-bam-base"; interrupts = <0 247 0>; qcom,bam-pipe-pair = <2>; qcom,ce-hw-instance = <0>; qcom,ce-device = <0>; qcom,bam-ee = <0>; qcom,ce-hw-shared; qcom,clk-mgmt-sus-res; qcom,msm-bus,name = "qcrypto-noc"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <125 512 0 0>, <125 512 393600 393600>; qcom,use-sw-aes-cbc-ecb-ctr-algo; qcom,use-sw-aes-xts-algo; qcom,use-sw-aes-ccm-algo; qcom,use-sw-ahash-algo; qcom,use-sw-aead-algo; qcom,use-sw-hmac-algo; qcom,smmu-s1-enable; qcom,no-clock-support; iommus = <&apps_smmu 0x01A4 0x0011>, <&apps_smmu 0x01B4 0x0011>; }; slim_aud: slim@a2c0000 { cell-index = <1>; compatible = "qcom,slim-ngd"; Loading