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Commit 0df4e2be authored by Satya Rama Aditya Pinapala's avatar Satya Rama Aditya Pinapala
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drm/msm/dsi-staging: fix clock gating sequence 



Clock gating sequence needed to be fixed to ensure correct programming
of branch clock RCGs.  Clock gating is supposed to be turned on after 
PLL is prepared and while turning off the clock, clock gating 
needs to be disabled before the branch clocks are disabled.

Change-Id: Ib330e969f07ac97c14bf00b17040fbbf4327d350
Signed-off-by: default avatarSatya Rama Aditya Pinapala <psraditya30@codeaurora.org>
parent cc869a5a

drivers/gpu/drm/msm/dsi-staging/dsi_display.c

+22 −12
Original line number Diff line number Diff line
@@ -3010,7 +3010,7 @@ int dsi_pre_clkoff_cb(void *priv, 
	struct dsi_display_ctrl *ctrl;



	if ((clk & DSI_LINK_CLK) && (new_state == DSI_CLK_OFF) &&

		(l_type && DSI_LINK_LP_CLK)) {

		(l_type & DSI_LINK_LP_CLK)) {

		/*

		 * If continuous clock is enabled then disable it

		 * before entering into ULPS Mode.
@@ -3033,6 +3033,20 @@ int dsi_pre_clkoff_cb(void *priv, 
			       __func__, rc);

	}



	if ((clk & DSI_LINK_CLK) && (new_state == DSI_CLK_OFF) &&

		(l_type & DSI_LINK_HS_CLK)) {

		/*

		 * PHY clock gating should be disabled before the PLL and the

		 * branch clocks are turned off. Otherwise, it is possible that

		 * the clock RCGs may not be turned off correctly resulting

		 * in clock warnings.

		 */

		rc = dsi_display_config_clk_gating(display, false);

		if (rc)

			pr_err("[%s] failed to disable clk gating, rc=%d\n",

					display->name, rc);

	}



	if ((clk & DSI_CORE_CLK) && (new_state == DSI_CLK_OFF)) {

		/*

		 * Enable DSI clamps only if entering idle power collapse or
@@ -3045,10 +3059,6 @@ int dsi_pre_clkoff_cb(void *priv, 
			if (rc)

				pr_err("%s: Failed to enable dsi clamps. rc=%d\n",

					__func__, rc);

			rc = dsi_display_config_clk_gating(display, false);

			if (rc)

				pr_err("[%s] failed to disable clk gating, rc=%d\n",

						display->name, rc);



			rc = dsi_display_phy_reset_config(display, false);

			if (rc)
@@ -3128,13 +3138,6 @@ int dsi_post_clkon_cb(void *priv, 
			}

		}



		rc = dsi_display_config_clk_gating(display, true);

		if (rc) {

			pr_err("[%s] failed to enable clk gating %d\n",

					display->name, rc);

			goto error;

		}



		rc = dsi_display_phy_reset_config(display, true);

		if (rc) {

			pr_err("%s: Failed to reset phy, rc=%d\n",
@@ -3171,6 +3174,13 @@ int dsi_post_clkon_cb(void *priv, 


		if (display->panel->host_config.force_hs_clk_lane)

			_dsi_display_continuous_clk_ctrl(display, true);



		rc = dsi_display_config_clk_gating(display, true);

		if (rc) {

			pr_err("[%s] failed to enable clk gating %d\n",

					display->name, rc);

			goto error;

		}

	}



	/* enable dsi to serve irqs */