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Commit 0db88144 authored by Narendra Muppalla's avatar Narendra Muppalla
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Merge commit rebaseing msm-4.14-display topic branch to au-263



* commit '639e198b':
  msm: vidc: Use work mode 2 for avc encode with width > 3840
  msm: adsprpc: DSP device node to provide restricted access to ADSP/SLPI
  mm, oom: remove 3% bonus for CAP_SYS_ADMIN processes
  defconfig: Enable RPM stats drivers for qcs405
  regulator: spm-regulator: Add support for HFS430 type regulators
  msm: ipa: Enable Hashable routing and filtering IPA rules
  msm: ipa4: Adapt IPA resource groups for IPA 4.5
  ARM: dts: msm: add ipa and gsi nodes for sdxprairie
  msm: vidc: Revise printed msg type for format constraint
  ARM: dts: msm: Correct the cache sizes on sm6150
  coresight: csr: delete the spinlock in csr_remove function
  msm: vidc: Consider operating rate in load calculations
  ARM: dts: msm: Modify video node values for SM8150 v2
  ARM: dts: msm: Add smcinvoke node for SM8150
  msm: mink: Add support for local objects
  ARM: dts: msm: disable ufs low power mode for sa8155
  defconfig: Enable cnss_genl driver compilation
  msm: ADSPRPC: Fix array out of bounds issue
  ARM: dts: msm: Add DSI/DP/WB support for ADP Star
  ARM: dts: msm: correct interrupt lines of gfx smmu on qcs405
  ARM: dts: msm: Fix clock node name
  ARM: dts: msm: Change QMP interrupt register for SM8150
  mmc: core: rescan for card if deferred resume fails
  soc: qcom: smp2p: Add IPC logging support
  soc: qcom: smp2p: Add restart ack feature
  usb: phy: Don't free phy memory from remove() API
  kernel/msm: hdcp: Add API to enforce/revoke forced encryption
  ARM: dts: msm: Add device node support for TSENS in sdmmagpie
  ion: Fix missing mutex_unlock on error path
  soc: qcom: dcc_v2: add clocks support in probe
  defconfig: Enable CONFIG_HIGHMEM for QCS405
  input: touchscreen: multi-touch for ST touch
  defconfig: enable compute governor on qcs405 target
  wil6210: publish/receive WMI events/commands through nl
  wil6210: BRP antenna limit API
  ARM: dts: msm: add cpu dmips capacity for qcs405
  defconfig: sm8150: Enable support for UVC devices
  scsi: ufs: Fix race condition in rls_work and ufshcd_resume
  ARM: dts: msm: use PM8150 LDO 18 for USB SS supply on SM8150 QRD DVT boards

Change-Id: I184f36636db69d1081d048741a48b7127d059519
Signed-off-by: default avatarNarendra Muppalla <NarendraM@codeaurora.org>
parents 3ef19c0b 639e198b
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+1 −0
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@@ -16,6 +16,7 @@ Optional properties:
- qcom,secure-context-bank		:	Bool indicating secure FastRPC context bank.
- qcom,fastrpc-legacy-remote-heap	:	Bool indicating hypervisor is not supported.
- qcom,fastrpc-adsp-audio-pdr:  Flag to enable ADSP Audio PDR
- qcom,secure-domains:  FastRPC secure domain configuration

Optional subnodes:
- qcom,msm_fastrpc_compute_cb :	Child nodes representing the compute context
+11 −0
Original line number Diff line number Diff line
* SMCInvoke driver to provide transport between TZ and Linux

Required properties:
- compatible : Should be "qcom,smcinvoke"
- reg : should contain memory region address reserved for loading secure apps.

Example:
	qcom_smcinvoke: smcinvoke@87900000 {
		compatible = "qcom,smcinvoke";
		reg = <0x87900000 0x2200000>;
	};
+4 −0
Original line number Diff line number Diff line
@@ -36,6 +36,7 @@ CONFIG_ARCH_QCS405=y
CONFIG_SMP=y
CONFIG_ARM_PSCI=y
CONFIG_PREEMPT=y
CONFIG_HIGHMEM=y
CONFIG_CLEANCACHE=y
CONFIG_CMA=y
CONFIG_CMA_DEBUGFS=y
@@ -424,6 +425,9 @@ CONFIG_MSM_TZ_SMMU=y
CONFIG_QCOM_GLINK=y
CONFIG_QCOM_GLINK_PKT=y
# CONFIG_MSM_JTAGV8 is not set
CONFIG_QTI_RPM_STATS_LOG=y
CONFIG_ARM_MEMLAT_MON=y
CONFIG_DEVFREQ_GOV_MEMLAT=y
CONFIG_EXTCON_USB_GPIO=y
CONFIG_IIO=y
CONFIG_QCOM_SPMI_ADC5=y
+53 −0
Original line number Diff line number Diff line
/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

&mdss_mdp {
	dsi_ext_bridge_1080p: qcom,mdss_dsi_ext_bridge_1080p {
		qcom,mdss-dsi-panel-name = "ext video mode dsi bridge";
		qcom,mdss-dsi-panel-type = "dsi_video_mode";
		qcom,mdss-dsi-virtual-channel-id = <0>;
		qcom,mdss-dsi-stream = <0>;
		qcom,mdss-dsi-bpp = <24>;
		qcom,mdss-dsi-border-color = <0>;
		qcom,mdss-dsi-traffic-mode = "non_burst_sync_pulse";
		qcom,mdss-dsi-bllp-eof-power-mode;
		qcom,mdss-dsi-bllp-power-mode;
		qcom,mdss-dsi-lane-0-state;
		qcom,mdss-dsi-lane-1-state;
		qcom,mdss-dsi-lane-2-state;
		qcom,mdss-dsi-lane-3-state;
		qcom,mdss-dsi-dma-trigger = "trigger_sw";
		qcom,mdss-dsi-mdp-trigger = "none";
		qcom,mdss-dsi-t-clk-post = <0x03>;
		qcom,mdss-dsi-t-clk-pre = <0x24>;
		qcom,mdss-dsi-force-clock-lane-hs;
		qcom,mdss-dsi-ext-bridge-mode;

		qcom,mdss-dsi-display-timings {
			timing@0{
				qcom,mdss-dsi-panel-width = <1920>;
				qcom,mdss-dsi-panel-height = <1080>;
				qcom,mdss-dsi-h-front-porch = <88>;
				qcom,mdss-dsi-h-back-porch = <148>;
				qcom,mdss-dsi-h-pulse-width = <44>;
				qcom,mdss-dsi-h-sync-skew = <0>;
				qcom,mdss-dsi-v-back-porch = <36>;
				qcom,mdss-dsi-v-front-porch = <4>;
				qcom,mdss-dsi-v-pulse-width = <5>;
				qcom,mdss-dsi-h-sync-pulse = <0>;
				qcom,mdss-dsi-panel-framerate = <60>;
				qcom,display-topology = <1 0 1>;
				qcom,default-topology-index = <0>;
			};
		};
	};
};
+4 −4
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@@ -28,10 +28,10 @@
		#size-cells = <1>;
		#address-cells = <1>;
		ranges;
		interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
		interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&clock_gcc GCC_SMMU_CFG_CLK>,
				<&clock_gcc GCC_GFX_TCU_CLK>;
		clock-names = "iface_clk", "core_clk";
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