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Commit 0d4a1450 authored by Ilia Mirkin's avatar Ilia Mirkin Committed by Ben Skeggs
Browse files

drm/nouveau/vdec: fork vp3 implementations from vp2

parent a0fd4ec8
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+2 −0
Original line number Diff line number Diff line
@@ -148,6 +148,7 @@ nouveau-y += core/engine/dmaobj/nv50.o
nouveau-y += core/engine/dmaobj/nvc0.o
nouveau-y += core/engine/dmaobj/nvd0.o
nouveau-y += core/engine/bsp/nv84.o
nouveau-y += core/engine/bsp/nv98.o
nouveau-y += core/engine/bsp/nvc0.o
nouveau-y += core/engine/bsp/nve0.o
nouveau-y += core/engine/copy/nva3.o
@@ -222,6 +223,7 @@ nouveau-y += core/engine/software/nv10.o
nouveau-y += core/engine/software/nv50.o
nouveau-y += core/engine/software/nvc0.o
nouveau-y += core/engine/vp/nv84.o
nouveau-y += core/engine/vp/nv98.o
nouveau-y += core/engine/vp/nvc0.o
nouveau-y += core/engine/vp/nve0.o

+93 −0
Original line number Diff line number Diff line
/*
 * Copyright 2012 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Ben Skeggs
 */

#include <core/engctx.h>
#include <core/class.h>

#include <engine/bsp.h>

struct nv98_bsp_priv {
	struct nouveau_engine base;
};

/*******************************************************************************
 * BSP object classes
 ******************************************************************************/

static struct nouveau_oclass
nv98_bsp_sclass[] = {
	{},
};

/*******************************************************************************
 * BSP context
 ******************************************************************************/

static struct nouveau_oclass
nv98_bsp_cclass = {
	.handle = NV_ENGCTX(BSP, 0x98),
	.ofuncs = &(struct nouveau_ofuncs) {
		.ctor = _nouveau_engctx_ctor,
		.dtor = _nouveau_engctx_dtor,
		.init = _nouveau_engctx_init,
		.fini = _nouveau_engctx_fini,
		.rd32 = _nouveau_engctx_rd32,
		.wr32 = _nouveau_engctx_wr32,
	},
};

/*******************************************************************************
 * BSP engine/subdev functions
 ******************************************************************************/

static int
nv98_bsp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
	      struct nouveau_oclass *oclass, void *data, u32 size,
	      struct nouveau_object **pobject)
{
	struct nv98_bsp_priv *priv;
	int ret;

	ret = nouveau_engine_create(parent, engine, oclass, true,
				    "PBSP", "bsp", &priv);
	*pobject = nv_object(priv);
	if (ret)
		return ret;

	nv_subdev(priv)->unit = 0x04008000;
	nv_engine(priv)->cclass = &nv98_bsp_cclass;
	nv_engine(priv)->sclass = nv98_bsp_sclass;
	return 0;
}

struct nouveau_oclass
nv98_bsp_oclass = {
	.handle = NV_ENGINE(BSP, 0x98),
	.ofuncs = &(struct nouveau_ofuncs) {
		.ctor = nv98_bsp_ctor,
		.dtor = _nouveau_engine_dtor,
		.init = _nouveau_engine_init,
		.fini = _nouveau_engine_fini,
	},
};
+14 −14
Original line number Diff line number Diff line
@@ -227,9 +227,9 @@ nv50_identify(struct nouveau_device *device)
		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv84_fifo_oclass;
		device->oclass[NVDEV_ENGINE_SW     ] = &nv50_software_oclass;
		device->oclass[NVDEV_ENGINE_GR     ] = &nv50_graph_oclass;
		device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;
		device->oclass[NVDEV_ENGINE_VP     ] = &nv98_vp_oclass;
		device->oclass[NVDEV_ENGINE_CRYPT  ] = &nv98_crypt_oclass;
		device->oclass[NVDEV_ENGINE_BSP    ] = &nv84_bsp_oclass;
		device->oclass[NVDEV_ENGINE_BSP    ] = &nv98_bsp_oclass;
		device->oclass[NVDEV_ENGINE_PPP    ] = &nv98_ppp_oclass;
		device->oclass[NVDEV_ENGINE_DISP   ] = &nv94_disp_oclass;
		break;
@@ -279,9 +279,9 @@ nv50_identify(struct nouveau_device *device)
		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv84_fifo_oclass;
		device->oclass[NVDEV_ENGINE_SW     ] = &nv50_software_oclass;
		device->oclass[NVDEV_ENGINE_GR     ] = &nv50_graph_oclass;
		device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;
		device->oclass[NVDEV_ENGINE_VP     ] = &nv98_vp_oclass;
		device->oclass[NVDEV_ENGINE_CRYPT  ] = &nv98_crypt_oclass;
		device->oclass[NVDEV_ENGINE_BSP    ] = &nv84_bsp_oclass;
		device->oclass[NVDEV_ENGINE_BSP    ] = &nv98_bsp_oclass;
		device->oclass[NVDEV_ENGINE_PPP    ] = &nv98_ppp_oclass;
		device->oclass[NVDEV_ENGINE_DISP   ] = &nv94_disp_oclass;
		break;
@@ -305,9 +305,9 @@ nv50_identify(struct nouveau_device *device)
		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv84_fifo_oclass;
		device->oclass[NVDEV_ENGINE_SW     ] = &nv50_software_oclass;
		device->oclass[NVDEV_ENGINE_GR     ] = &nv50_graph_oclass;
		device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;
		device->oclass[NVDEV_ENGINE_VP     ] = &nv98_vp_oclass;
		device->oclass[NVDEV_ENGINE_CRYPT  ] = &nv98_crypt_oclass;
		device->oclass[NVDEV_ENGINE_BSP    ] = &nv84_bsp_oclass;
		device->oclass[NVDEV_ENGINE_BSP    ] = &nv98_bsp_oclass;
		device->oclass[NVDEV_ENGINE_PPP    ] = &nv98_ppp_oclass;
		device->oclass[NVDEV_ENGINE_DISP   ] = &nv94_disp_oclass;
		break;
@@ -332,8 +332,8 @@ nv50_identify(struct nouveau_device *device)
		device->oclass[NVDEV_ENGINE_SW     ] = &nv50_software_oclass;
		device->oclass[NVDEV_ENGINE_GR     ] = &nv50_graph_oclass;
		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv84_mpeg_oclass;
		device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;
		device->oclass[NVDEV_ENGINE_BSP    ] = &nv84_bsp_oclass;
		device->oclass[NVDEV_ENGINE_VP     ] = &nv98_vp_oclass;
		device->oclass[NVDEV_ENGINE_BSP    ] = &nv98_bsp_oclass;
		device->oclass[NVDEV_ENGINE_PPP    ] = &nv98_ppp_oclass;
		device->oclass[NVDEV_ENGINE_COPY0  ] = &nva3_copy_oclass;
		device->oclass[NVDEV_ENGINE_DISP   ] = &nva3_disp_oclass;
@@ -358,8 +358,8 @@ nv50_identify(struct nouveau_device *device)
		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv84_fifo_oclass;
		device->oclass[NVDEV_ENGINE_SW     ] = &nv50_software_oclass;
		device->oclass[NVDEV_ENGINE_GR     ] = &nv50_graph_oclass;
		device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;
		device->oclass[NVDEV_ENGINE_BSP    ] = &nv84_bsp_oclass;
		device->oclass[NVDEV_ENGINE_VP     ] = &nv98_vp_oclass;
		device->oclass[NVDEV_ENGINE_BSP    ] = &nv98_bsp_oclass;
		device->oclass[NVDEV_ENGINE_PPP    ] = &nv98_ppp_oclass;
		device->oclass[NVDEV_ENGINE_COPY0  ] = &nva3_copy_oclass;
		device->oclass[NVDEV_ENGINE_DISP   ] = &nva3_disp_oclass;
@@ -384,8 +384,8 @@ nv50_identify(struct nouveau_device *device)
		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv84_fifo_oclass;
		device->oclass[NVDEV_ENGINE_SW     ] = &nv50_software_oclass;
		device->oclass[NVDEV_ENGINE_GR     ] = &nv50_graph_oclass;
		device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;
		device->oclass[NVDEV_ENGINE_BSP    ] = &nv84_bsp_oclass;
		device->oclass[NVDEV_ENGINE_VP     ] = &nv98_vp_oclass;
		device->oclass[NVDEV_ENGINE_BSP    ] = &nv98_bsp_oclass;
		device->oclass[NVDEV_ENGINE_PPP    ] = &nv98_ppp_oclass;
		device->oclass[NVDEV_ENGINE_COPY0  ] = &nva3_copy_oclass;
		device->oclass[NVDEV_ENGINE_DISP   ] = &nva3_disp_oclass;
@@ -410,8 +410,8 @@ nv50_identify(struct nouveau_device *device)
		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv84_fifo_oclass;
		device->oclass[NVDEV_ENGINE_SW     ] = &nv50_software_oclass;
		device->oclass[NVDEV_ENGINE_GR     ] = &nv50_graph_oclass;
		device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;
		device->oclass[NVDEV_ENGINE_BSP    ] = &nv84_bsp_oclass;
		device->oclass[NVDEV_ENGINE_VP     ] = &nv98_vp_oclass;
		device->oclass[NVDEV_ENGINE_BSP    ] = &nv98_bsp_oclass;
		device->oclass[NVDEV_ENGINE_PPP    ] = &nv98_ppp_oclass;
		device->oclass[NVDEV_ENGINE_COPY0  ] = &nva3_copy_oclass;
		device->oclass[NVDEV_ENGINE_DISP   ] = &nva3_disp_oclass;
+93 −0
Original line number Diff line number Diff line
/*
 * Copyright 2012 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Ben Skeggs
 */

#include <core/engctx.h>
#include <core/class.h>

#include <engine/vp.h>

struct nv98_vp_priv {
	struct nouveau_engine base;
};

/*******************************************************************************
 * VP object classes
 ******************************************************************************/

static struct nouveau_oclass
nv98_vp_sclass[] = {
	{},
};

/*******************************************************************************
 * PVP context
 ******************************************************************************/

static struct nouveau_oclass
nv98_vp_cclass = {
	.handle = NV_ENGCTX(VP, 0x98),
	.ofuncs = &(struct nouveau_ofuncs) {
		.ctor = _nouveau_engctx_ctor,
		.dtor = _nouveau_engctx_dtor,
		.init = _nouveau_engctx_init,
		.fini = _nouveau_engctx_fini,
		.rd32 = _nouveau_engctx_rd32,
		.wr32 = _nouveau_engctx_wr32,
	},
};

/*******************************************************************************
 * PVP engine/subdev functions
 ******************************************************************************/

static int
nv98_vp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
	     struct nouveau_oclass *oclass, void *data, u32 size,
	     struct nouveau_object **pobject)
{
	struct nv98_vp_priv *priv;
	int ret;

	ret = nouveau_engine_create(parent, engine, oclass, true,
				    "PVP", "vp", &priv);
	*pobject = nv_object(priv);
	if (ret)
		return ret;

	nv_subdev(priv)->unit = 0x01020000;
	nv_engine(priv)->cclass = &nv98_vp_cclass;
	nv_engine(priv)->sclass = nv98_vp_sclass;
	return 0;
}

struct nouveau_oclass
nv98_vp_oclass = {
	.handle = NV_ENGINE(VP, 0x98),
	.ofuncs = &(struct nouveau_ofuncs) {
		.ctor = nv98_vp_ctor,
		.dtor = _nouveau_engine_dtor,
		.init = _nouveau_engine_init,
		.fini = _nouveau_engine_fini,
	},
};
+1 −0
Original line number Diff line number Diff line
@@ -2,6 +2,7 @@
#define __NOUVEAU_BSP_H__

extern struct nouveau_oclass nv84_bsp_oclass;
extern struct nouveau_oclass nv98_bsp_oclass;
extern struct nouveau_oclass nvc0_bsp_oclass;
extern struct nouveau_oclass nve0_bsp_oclass;

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