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Commit 0cf17256 authored by Marek Vasut's avatar Marek Vasut Committed by Cyrille Pitchen
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mtd: spi-nor: cqspi: Fix build on arches missing readsl/writesl



The x86-64 and some other architectures are missing readsl/writesl
functions, so this driver won't build on them. Use a more portable
ioread32_rep()/iowrite32_rep() instead.

Signed-off-by: default avatarMarek Vasut <marex@denx.de>
Cc: Alan Tull <atull@opensource.altera.com>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Graham Moore <grmoore@opensource.altera.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Yves Vandervennet <yvanderv@opensource.altera.com>
Suggested-by: default avatarStefan Roese <sr@denx.de>
Signed-off-by: default avatarCyrille Pitchen <cyrille.pitchen@atmel.com>
parent 7ce7d89f
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+1 −1
Original line number Diff line number Diff line
@@ -40,7 +40,7 @@ config SPI_ATMEL_QUADSPI

config SPI_CADENCE_QUADSPI
	tristate "Cadence Quad SPI controller"
	depends on OF && ARM
	depends on OF && (ARM || COMPILE_TEST)
	help
	  Enable support for the Cadence Quad SPI Flash controller.

+4 −2
Original line number Diff line number Diff line
@@ -526,7 +526,8 @@ static int cqspi_indirect_read_execute(struct spi_nor *nor,
			bytes_to_read *= cqspi->fifo_width;
			bytes_to_read = bytes_to_read > remaining ?
					remaining : bytes_to_read;
			readsl(ahb_base, rxbuf, DIV_ROUND_UP(bytes_to_read, 4));
			ioread32_rep(ahb_base, rxbuf,
				     DIV_ROUND_UP(bytes_to_read, 4));
			rxbuf += bytes_to_read;
			remaining -= bytes_to_read;
			bytes_to_read = cqspi_get_rd_sram_level(cqspi);
@@ -610,7 +611,8 @@ static int cqspi_indirect_write_execute(struct spi_nor *nor,

	while (remaining > 0) {
		write_bytes = remaining > page_size ? page_size : remaining;
		writesl(cqspi->ahb_base, txbuf, DIV_ROUND_UP(write_bytes, 4));
		iowrite32_rep(cqspi->ahb_base, txbuf,
			      DIV_ROUND_UP(write_bytes, 4));

		ret = wait_for_completion_timeout(&cqspi->transfer_complete,
						  msecs_to_jiffies