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Commit 0c2d34aa authored by Andy Yan's avatar Andy Yan Committed by Heiko Stuebner
Browse files

ARM: dts: rockchip: add pwm dt nodes for rv1108 



Add pwm device tree node for rv1108 soc

Signed-off-by: default avatarAndy Yan <andy.yan@rock-chips.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 4d1dc2d1

arch/arm/boot/dts/rv1108.dtsi

+144 −0
Original line number Diff line number Diff line
@@ -213,6 +213,54 @@ 
		status = "disabled";

	};



	pwm4: pwm@10280000 {

		compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";

		reg = <0x10280000 0x10>;

		interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;

		clock-names = "pwm", "pclk";

		pinctrl-names = "default";

		pinctrl-0 = <&pwm4_pin>;

		#pwm-cells = <3>;

		status = "disabled";

	};



	pwm5: pwm@10280010 {

		compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";

		reg = <0x10280010 0x10>;

		interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;

		clock-names = "pwm", "pclk";

		pinctrl-names = "default";

		pinctrl-0 = <&pwm5_pin>;

		#pwm-cells = <3>;

		status = "disabled";

	};



	pwm6: pwm@10280020 {

		compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";

		reg = <0x10280020 0x10>;

		interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;

		clock-names = "pwm", "pclk";

		pinctrl-names = "default";

		pinctrl-0 = <&pwm6_pin>;

		#pwm-cells = <3>;

		status = "disabled";

	};



	pwm7: pwm@10280030 {

		compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";

		reg = <0x10280030 0x10>;

		interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;

		clock-names = "pwm", "pclk";

		pinctrl-names = "default";

		pinctrl-0 = <&pwm7_pin>;

		#pwm-cells = <3>;

		status = "disabled";

	};



	grf: syscon@10300000 {

		compatible = "rockchip,rv1108-grf", "syscon";

		reg = <0x10300000 0x1000>;
@@ -252,6 +300,54 @@ 
		status = "disabled";

	};



	pwm0: pwm@20040000 {

		compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";

		reg = <0x20040000 0x10>;

		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;

		clock-names = "pwm", "pclk";

		pinctrl-names = "default";

		pinctrl-0 = <&pwm0_pin>;

		#pwm-cells = <3>;

		status = "disabled";

	};



	pwm1: pwm@20040010 {

		compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";

		reg = <0x20040010 0x10>;

		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;

		clock-names = "pwm", "pclk";

		pinctrl-names = "default";

		pinctrl-0 = <&pwm1_pin>;

		#pwm-cells = <3>;

		status = "disabled";

	};



	pwm2: pwm@20040020 {

		compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";

		reg = <0x20040020 0x10>;

		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;

		clock-names = "pwm", "pclk";

		pinctrl-names = "default";

		pinctrl-0 = <&pwm2_pin>;

		#pwm-cells = <3>;

		status = "disabled";

	};



	pwm3: pwm@20040030 {

		compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";

		reg = <0x20040030 0x10>;

		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;

		clock-names = "pwm", "pclk";

		pinctrl-names = "default";

		pinctrl-0 = <&pwm3_pin>;

		#pwm-cells = <3>;

		status = "disabled";

	};



	pmugrf: syscon@20060000 {

		compatible = "rockchip,rv1108-pmugrf", "syscon";

		reg = <0x20060000 0x1000>;
@@ -473,6 +569,54 @@ 
			};

		};



		pwm0 {

			pwm0_pin: pwm0-pin {

				rockchip,pins = <0 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;

			};

		};



		pwm1 {

			pwm1_pin: pwm1-pin {

				rockchip,pins = <0 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;

			};

		};



		pwm2 {

			pwm2_pin: pwm2-pin {

				rockchip,pins = <0 RK_PC6 RK_FUNC_1 &pcfg_pull_none>;

			};

		};



		pwm3 {

			pwm3_pin: pwm3-pin {

				rockchip,pins = <0 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;

			};

		};



		pwm4 {

			pwm4_pin: pwm4-pin {

				rockchip,pins = <1 RK_PC1 RK_FUNC_3 &pcfg_pull_none>;

			};

		};



		pwm5 {

			pwm5_pin: pwm5-pin {

				rockchip,pins = <1 RK_PA7 RK_FUNC_2 &pcfg_pull_none>;

			};

		};



		pwm6 {

			pwm6_pin: pwm6-pin {

				rockchip,pins = <1 RK_PB0 RK_FUNC_2 &pcfg_pull_none>;

			};

		};



		pwm7 {

			pwm7_pin: pwm7-pin {

				rockchip,pins = <1 RK_PB1 RK_FUNC_2 &pcfg_pull_none>;

			};

		};



		sdmmc {

			sdmmc_clk: sdmmc-clk {

				rockchip,pins = <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_drv_4ma>;