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Commit 0bfb1f8b authored by Sean Paul's avatar Sean Paul Committed by Inki Dae
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drm/exynos: Prepare/Unprepare HDMI subsystem clocks 



Change the clk_enable/clk_disable calls in mixer and hdmi drivers into
clk_prepare_enable/clk_disable_unprepare, respectively.

Signed-off-by: default avatarSean Paul <seanpaul@chromium.org>
Signed-off-by: default avatarRahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
parent cbc4c33d

drivers/gpu/drm/exynos/exynos_hdmi.c

+12 −12
Original line number Diff line number Diff line
@@ -1111,9 +1111,9 @@ static void hdmi_v13_mode_apply(struct hdmi_context *hdata) 
		hdmi_regs_dump(hdata, "timing apply");

	}



	clk_disable(hdata->res.sclk_hdmi);

	clk_disable_unprepare(hdata->res.sclk_hdmi);

	clk_set_parent(hdata->res.sclk_hdmi, hdata->res.sclk_hdmiphy);

	clk_enable(hdata->res.sclk_hdmi);

	clk_prepare_enable(hdata->res.sclk_hdmi);



	/* enable HDMI and timing generator */

	hdmi_reg_writemask(hdata, HDMI_CON_0, ~0, HDMI_EN);
@@ -1278,9 +1278,9 @@ static void hdmi_v14_mode_apply(struct hdmi_context *hdata) 
		hdmi_regs_dump(hdata, "timing apply");

	}



	clk_disable(hdata->res.sclk_hdmi);

	clk_disable_unprepare(hdata->res.sclk_hdmi);

	clk_set_parent(hdata->res.sclk_hdmi, hdata->res.sclk_hdmiphy);

	clk_enable(hdata->res.sclk_hdmi);

	clk_prepare_enable(hdata->res.sclk_hdmi);



	/* enable HDMI and timing generator */

	hdmi_reg_writemask(hdata, HDMI_CON_0, ~0, HDMI_EN);
@@ -1304,9 +1304,9 @@ static void hdmiphy_conf_reset(struct hdmi_context *hdata) 
	u8 buffer[2];

	u32 reg;



	clk_disable(hdata->res.sclk_hdmi);

	clk_disable_unprepare(hdata->res.sclk_hdmi);

	clk_set_parent(hdata->res.sclk_hdmi, hdata->res.sclk_pixel);

	clk_enable(hdata->res.sclk_hdmi);

	clk_prepare_enable(hdata->res.sclk_hdmi);



	/* operation mode */

	buffer[0] = 0x1f;
@@ -1683,9 +1683,9 @@ static void hdmi_poweron(struct hdmi_context *hdata) 
	if (regulator_bulk_enable(res->regul_count, res->regul_bulk))

		DRM_DEBUG_KMS("failed to enable regulator bulk\n");



	clk_enable(res->hdmiphy);

	clk_enable(res->hdmi);

	clk_enable(res->sclk_hdmi);

	clk_prepare_enable(res->hdmiphy);

	clk_prepare_enable(res->hdmi);

	clk_prepare_enable(res->sclk_hdmi);



	hdmiphy_poweron(hdata);

}
@@ -1706,9 +1706,9 @@ static void hdmi_poweroff(struct hdmi_context *hdata) 
	hdmiphy_conf_reset(hdata);

	hdmiphy_poweroff(hdata);



	clk_disable(res->sclk_hdmi);

	clk_disable(res->hdmi);

	clk_disable(res->hdmiphy);

	clk_disable_unprepare(res->sclk_hdmi);

	clk_disable_unprepare(res->hdmi);

	clk_disable_unprepare(res->hdmiphy);

	regulator_bulk_disable(res->regul_count, res->regul_bulk);



	mutex_lock(&hdata->hdmi_mutex);

drivers/gpu/drm/exynos/exynos_mixer.c

+6 −6
Original line number Diff line number Diff line
@@ -892,10 +892,10 @@ static void mixer_poweron(struct mixer_context *ctx) 
	ctx->powered = true;

	mutex_unlock(&ctx->mixer_mutex);



	clk_enable(res->mixer);

	clk_prepare_enable(res->mixer);

	if (ctx->vp_enabled) {

		clk_enable(res->vp);

		clk_enable(res->sclk_mixer);

		clk_prepare_enable(res->vp);

		clk_prepare_enable(res->sclk_mixer);

	}



	mixer_reg_write(res, MXR_INT_EN, ctx->int_en);
@@ -917,10 +917,10 @@ static void mixer_poweroff(struct mixer_context *ctx) 


	ctx->int_en = mixer_reg_read(res, MXR_INT_EN);



	clk_disable(res->mixer);

	clk_disable_unprepare(res->mixer);

	if (ctx->vp_enabled) {

		clk_disable(res->vp);

		clk_disable(res->sclk_mixer);

		clk_disable_unprepare(res->vp);

		clk_disable_unprepare(res->sclk_mixer);

	}



	mutex_lock(&ctx->mixer_mutex);