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Commit 0bed13be authored by Suman Tripathi's avatar Suman Tripathi Committed by Tejun Heo
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ahci_xgene: Skip the PHY and clock initialization if already configured by the firmware. 



This patch implements the feature to skip the PHY and clock
initialization if it is already configured by the firmware.

Signed-off-by: default avatarLoc Ho <lho@apm.com>
Signed-off-by: default avatarSuman Tripathi <stripathi@apm.com>
Signed-off-by: default avatarTejun Heo <tj@kernel.org>
parent c5edfff9

drivers/ata/ahci_xgene.c

+14 −1
Original line number Original line Diff line number Diff line
@@ -145,6 +145,14 @@ static unsigned int xgene_ahci_qc_issue(struct ata_queued_cmd *qc) 
	return rc;

	return rc;

}

}





static bool xgene_ahci_is_memram_inited(struct xgene_ahci_context *ctx)

{

	void __iomem *diagcsr = ctx->csr_diag;



	return (readl(diagcsr + CFG_MEM_RAM_SHUTDOWN) == 0 &&

	        readl(diagcsr + BLOCK_MEM_RDY) == 0xFFFFFFFF);

}



/**

/**

 * xgene_ahci_read_id - Read ID data from the specified device

 * xgene_ahci_read_id - Read ID data from the specified device

 * @dev: device

 * @dev: device
@@ -467,6 +475,11 @@ static int xgene_ahci_probe(struct platform_device *pdev) 
		return -ENODEV;

		return -ENODEV;

	}

	}





	if (xgene_ahci_is_memram_inited(ctx)) {

		dev_info(dev, "skip clock and PHY initialization\n");

		goto skip_clk_phy;

	}



	/* Due to errata, HW requires full toggle transition */

	/* Due to errata, HW requires full toggle transition */

	rc = ahci_platform_enable_clks(hpriv);

	rc = ahci_platform_enable_clks(hpriv);

	if (rc)

	if (rc)
@@ -479,7 +492,7 @@ static int xgene_ahci_probe(struct platform_device *pdev) 




	/* Configure the host controller */

	/* Configure the host controller */

	xgene_ahci_hw_init(hpriv);

	xgene_ahci_hw_init(hpriv);



skip_clk_phy:

	hpriv->flags = AHCI_HFLAG_NO_PMP | AHCI_HFLAG_NO_NCQ;

	hpriv->flags = AHCI_HFLAG_NO_PMP | AHCI_HFLAG_NO_NCQ;





	rc = ahci_platform_init_host(pdev, hpriv, &xgene_ahci_port_info);

	rc = ahci_platform_init_host(pdev, hpriv, &xgene_ahci_port_info);