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Commit 0ad44659 authored by Sebastian Hesselbarth's avatar Sebastian Hesselbarth Committed by Jason Cooper
Browse files

ARM: dove: relocate internal registers device nodes 



With mbus node in place, now relocate all internal device nodes
to internal-regs node with proper address ranges.

Signed-off-by: default avatarSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent 960ee4e7

arch/arm/boot/dts/dove.dtsi

+474 −481
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ 
/ {

	compatible = "marvell,dove";

	model = "Marvell Armada 88AP510 SoC";

	interrupt-parent = <&intc>;



	aliases {

		gpio0 = &gpio0;
@@ -42,22 +43,15 @@ 
			  MBUS_ID(0x01, 0xfd) 0 0xf8000000 0x8000000   /* BootROM  128M */

			  MBUS_ID(0x03, 0x01) 0 0xc8000000 0x0100000   /* CESA SRAM  1M */

			  MBUS_ID(0x0d, 0x00) 0 0xf0000000 0x0100000>; /* PMU  SRAM  1M */

	};



	soc@f1000000 {

		internal-regs {

			compatible = "simple-bus";

			#address-cells = <1>;

			#size-cells = <1>;

		interrupt-parent = <&intc>;



		ranges = <0xc8000000 0xc8000000 0x0100000   /* CESA SRAM   1M */

		          0xe0000000 0xe0000000 0x8000000   /* PCIe0 Mem 128M */

		          0xe8000000 0xe8000000 0x8000000   /* PCIe1 Mem 128M */

		          0xf0000000 0xf0000000 0x0100000   /* ScratchPad  1M */

		          0x00000000 0xf1000000 0x1000000   /* SB/NB regs 16M */

		          0xf2000000 0xf2000000 0x0100000   /* PCIe0 I/O   1M */

		          0xf2100000 0xf2100000 0x0100000   /* PCIe0 I/O   1M */

		          0xf8000000 0xf8000000 0x8000000>; /* BootROM   128M */

			ranges = <0x00000000 MBUS_ID(0xf0, 0x01) 0 0x0100000   /* MBUS regs  1M */

				  0x00800000 MBUS_ID(0xf0, 0x02) 0 0x1000000   /* AXI  regs 16M */

				  0xffffe000 MBUS_ID(0x03, 0x01) 0 0x0000800   /* CESA SRAM  2k */

				  0xfffff000 MBUS_ID(0x0d, 0x00) 0 0x0000800>; /* PMU  SRAM  2k */



			mbusc: mbus-ctrl@20000 {

				compatible = "marvell,mbus-controller";
@@ -444,7 +438,7 @@ 
			crypto: crypto-engine@30000 {

				compatible = "marvell,orion-crypto";

				reg = <0x30000 0x10000>,

			      <0xc8000000 0x800>;

				      <0xffffe000 0x800>;

				reg-names = "regs", "sram";

				interrupts = <31>;

				clocks = <&gate_clk 15>;
@@ -466,7 +460,6 @@ 


				channel1 {

					interrupts = <40>;

				dmacap,memset;

					dmacap,memcpy;

					dmacap,xor;

				};
@@ -487,7 +480,6 @@ 


				channel1 {

					interrupts = <43>;

				dmacap,memset;

					dmacap,memcpy;

					dmacap,xor;

				};
@@ -508,7 +500,7 @@ 
				};

			};



		eth: ethernet-controller@72000 {

			eth: ethernet-ctrl@72000 {

				compatible = "marvell,orion-eth";

				#address-cells = <1>;

				#size-cells = <0>;
@@ -529,3 +521,4 @@ 
			};

		};

	};

};