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Commit 0a1e8869 authored by Cyrill Gorcunov's avatar Cyrill Gorcunov Committed by Ingo Molnar
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x86: trampoline_64.S - use predefined constants with simplification 



Impact: cleanup

We may use macros from processor-flags.h instead
of hardcoding bits. Actually it's not direct mapping
of old instructions with new ones -- BTS does change
CF flag while MOV does not. But i didn't find any
dependency on CF in this code.

Signed-off-by: default avatarCyrill Gorcunov <gorcunov@openvz.org>
Acked-by: default avatarAlexander van Heukelum <heukelum@fastmail.fm>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 2d4d57db

arch/x86/kernel/trampoline_64.S

+9 −10
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ 
#include <asm/page.h>

#include <asm/msr.h>

#include <asm/segment.h>

#include <asm/processor-flags.h>



.section .rodata, "a", @progbits
@@ -73,8 +74,7 @@ r_base = . 
	lidtl	tidt - r_base	# load idt with 0, 0

	lgdtl	tgdt - r_base	# load gdt with whatever is appropriate



	xor	%ax, %ax

	inc	%ax		# protected mode (PE) bit

	mov	$X86_CR0_PE, %ax	# protected mode (PE) bit

	lmsw	%ax			# into protected mode



	# flush prefetch and jump to startup_32
@@ -86,9 +86,8 @@ startup_32: 
	movl	$__KERNEL_DS, %eax	# Initialize the %ds segment register

	movl	%eax, %ds



	xorl	%eax, %eax

	btsl	$5, %eax		# Enable PAE mode

	movl	%eax, %cr4

	movl	$X86_CR4_PAE, %eax

	movl	%eax, %cr4		# Enable PAE mode



					# Setup trampoline 4 level pagetables

	leal	(trampoline_level4_pgt - r_base)(%esi), %eax
@@ -99,9 +98,9 @@ startup_32: 
	xorl	%edx, %edx

	wrmsr



	xorl	%eax, %eax

	btsl	$31, %eax		# Enable paging and in turn activate Long Mode

	btsl	$0, %eax		# Enable protected mode

	# Enable paging and in turn activate Long Mode

	# Enable protected mode

	movl	$(X86_CR0_PG | X86_CR0_PE), %eax

	movl	%eax, %cr0



	/*