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Commit 0a11a6ae authored by Sebastian Hesselbarth's avatar Sebastian Hesselbarth Committed by Jason Cooper
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clk: mvebu: armada-xp: maintain clock init order



Init order of CLK_OF_DECLARE'd drivers depends on compile order.
Unfortunately, clk_of_init does not allow drivers to return errors,
e.g. -EPROBE_DEFER if parent clocks have not been registered, yet.

To avoid init order woes for MVEBU clock drivers, we take care of
proper init order ourselves. This patch joins core-clk and gating-clk
init to maintain proper init order.

Signed-off-by: default avatarSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent 07ad6836
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+9 −11
Original line number Diff line number Diff line
@@ -158,13 +158,6 @@ static const struct coreclk_soc_desc axp_coreclks = {
	.num_ratios = ARRAY_SIZE(axp_coreclk_ratios),
};

static void __init axp_coreclk_init(struct device_node *np)
{
	mvebu_coreclk_setup(np, &axp_coreclks);
}
CLK_OF_DECLARE(axp_core_clk, "marvell,armada-xp-core-clock",
	       axp_coreclk_init);

/*
 * Clock Gating Control
 */
@@ -202,9 +195,14 @@ static const struct clk_gating_soc_desc axp_gating_desc[] __initconst = {
	{ }
};

static void __init axp_clk_gating_init(struct device_node *np)
static void __init axp_clk_init(struct device_node *np)
{
	mvebu_clk_gating_setup(np, axp_gating_desc);
	struct device_node *cgnp =
		of_find_compatible_node(NULL, NULL, "marvell,armada-xp-gating-clock");

	mvebu_coreclk_setup(np, &axp_coreclks);

	if (cgnp)
		mvebu_clk_gating_setup(cgnp, axp_gating_desc);
}
CLK_OF_DECLARE(axp_clk_gating, "marvell,armada-xp-gating-clock",
	       axp_clk_gating_init);
CLK_OF_DECLARE(axp_clk, "marvell,armada-xp-core-clock", axp_clk_init);