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Commit 097a82cb authored by Maciej Purski's avatar Maciej Purski Committed by Greg Kroah-Hartman
Browse files

drm/bridge/sii8620: fix display of packed pixel modes in MHL2 



[ Upstream commit e8b92efa629dac0e70ea4145c5e70616de5f89c8 ]

Currently packed pixel modes in MHL2 can't be displayed. The device
automatically recognizes output format, so setting format other than
RGB causes failure. Fix it by writing proper values to registers.

Tested on MHL1 and MHL2 using various vendors' dongles both in
DVI and HDMI mode.

Signed-off-by: default avatarMaciej Purski <m.purski@samsung.com>
Signed-off-by: default avatarAndrzej Hajda <a.hajda@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1516706239-9104-1-git-send-email-m.purski@samsung.com


Signed-off-by: default avatarSasha Levin <alexander.levin@microsoft.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 7a21294b

drivers/gpu/drm/bridge/sil-sii8620.c

+1 −16
Original line number Diff line number Diff line
@@ -1038,20 +1038,11 @@ static void sii8620_stop_video(struct sii8620 *ctx) 


static void sii8620_set_format(struct sii8620 *ctx)

{

	u8 out_fmt;



	if (sii8620_is_mhl3(ctx)) {

		sii8620_setbits(ctx, REG_M3_P0CTRL,

				BIT_M3_P0CTRL_MHL3_P0_PIXEL_MODE_PACKED,

				ctx->use_packed_pixel ? ~0 : 0);

	} else {

		if (ctx->use_packed_pixel)

			sii8620_write_seq_static(ctx,

				REG_VID_MODE, BIT_VID_MODE_M1080P,

				REG_MHL_TOP_CTL, BIT_MHL_TOP_CTL_MHL_PP_SEL | 1,

				REG_MHLTX_CTL6, 0x60

			);

		else

			sii8620_write_seq_static(ctx,

				REG_VID_MODE, 0,

				REG_MHL_TOP_CTL, 1,
@@ -1059,15 +1050,9 @@ static void sii8620_set_format(struct sii8620 *ctx) 
			);

	}



	if (ctx->use_packed_pixel)

		out_fmt = VAL_TPI_FORMAT(YCBCR422, FULL) |

			BIT_TPI_OUTPUT_CSCMODE709;

	else

		out_fmt = VAL_TPI_FORMAT(RGB, FULL);



	sii8620_write_seq(ctx,

		REG_TPI_INPUT, VAL_TPI_FORMAT(RGB, FULL),

		REG_TPI_OUTPUT, out_fmt,

		REG_TPI_OUTPUT, VAL_TPI_FORMAT(RGB, FULL),

	);

}