Merge "power: smb5: Fix VCONN orientation under SW control" into msm-4.14 (0969f2ef) · Commits · e / devices / android_kernel_oneplus_sm8150

drivers/power/supply/qcom/smb5-lib.c

+14 −9

Original line number	Diff line number	Diff line
		@@ -1010,13 +1010,25 @@ int smblib_vconn_regulator_enable(struct regulator_dev *rdev)
		{
		struct smb_charger *chg = rdev_get_drvdata(rdev);
		int rc = 0;
		u8 stat, orientation;

		smblib_dbg(chg, PR_OTG, "enabling VCONN\n");

		rc = smblib_read(chg, TYPE_C_MISC_STATUS_REG, &stat);
		if (rc < 0) {
		smblib_err(chg, "Couldn't read TYPE_C_STATUS_4 rc=%d\n", rc);
		return rc;
		}

		/* VCONN orientation is opposite to that of CC */
		orientation =
		stat & TYPEC_CCOUT_VALUE_BIT ? 0 : VCONN_EN_ORIENTATION_BIT;
		rc = smblib_masked_write(chg, TYPE_C_VCONN_CONTROL_REG,
		VCONN_EN_VALUE_BIT, VCONN_EN_VALUE_BIT);
		VCONN_EN_VALUE_BIT \| VCONN_EN_ORIENTATION_BIT,
		VCONN_EN_VALUE_BIT \| orientation);
		if (rc < 0) {
		smblib_err(chg, "Couldn't enable vconn setting rc=%d\n", rc);
		smblib_err(chg, "Couldn't read TYPE_C_CCOUT_CONTROL_REG rc=%d\n",
		rc);
		return rc;
		}

		@@ -3052,13 +3064,6 @@ static void smblib_handle_typec_removal(struct smb_charger *chg)
		if (rc < 0)
		smblib_err(chg, "Couldn't enable HW cc_out rc=%d\n", rc);


		rc = smblib_masked_write(chg, TYPE_C_VCONN_CONTROL_REG,
		VCONN_EN_SRC_BIT, 0);
		if (rc < 0)
		smblib_err(chg, "Couldn't set TYPE_C_VCONN_CONTROL_REG rc=%d\n",
		rc);

		/* clear exit sink based on cc */
		rc = smblib_masked_write(chg, TYPE_C_EXIT_STATE_CFG_REG,
		EXIT_SNK_BASED_ON_CC_BIT, 0);

+2 −0

Original line number	Diff line number	Diff line
		@@ -281,10 +281,12 @@ enum {
		#define TYPEC_DISABLE_CMD_BIT BIT(0)

		#define TYPE_C_VCONN_CONTROL_REG (TYPEC_BASE + 0x46)
		#define VCONN_EN_ORIENTATION_BIT BIT(2)
		#define VCONN_EN_VALUE_BIT BIT(1)
		#define VCONN_EN_SRC_BIT BIT(0)

		#define TYPE_C_CCOUT_CONTROL_REG (TYPEC_BASE + 0x48)
		#define TYPEC_CCOUT_VALUE_BIT BIT(1)
		#define TYPEC_CCOUT_SRC_BIT BIT(0)

		#define TYPE_C_EXIT_STATE_CFG_REG (TYPEC_BASE + 0x50)