Loading drivers/platform/msm/ipa/ipa_v3/ipa_dp.c +19 −5 Original line number Diff line number Diff line Loading @@ -294,6 +294,7 @@ int ipa3_send(struct ipa3_sys_context *sys, u32 mem_flag = GFP_ATOMIC; const struct ipa_gsi_ep_config *gsi_ep_cfg; bool send_nop = false; unsigned int max_desc; if (unlikely(!in_atomic)) mem_flag = GFP_KERNEL; Loading @@ -311,14 +312,18 @@ int ipa3_send(struct ipa3_sys_context *sys, return -EPERM; } if (unlikely(num_desc > gsi_ep_cfg->ipa_if_tlv)) { max_desc = gsi_ep_cfg->ipa_if_tlv; if (gsi_ep_cfg->prefetch_mode == GSI_SMART_PRE_FETCH || gsi_ep_cfg->prefetch_mode == GSI_FREE_PRE_FETCH) max_desc -= gsi_ep_cfg->prefetch_threshold; if (unlikely(num_desc > max_desc)) { IPAERR("Too many chained descriptors need=%d max=%d\n", num_desc, gsi_ep_cfg->ipa_if_tlv); num_desc, max_desc); WARN_ON(1); return -EPERM; } /* initialize only the xfers we use */ memset(gsi_xfer, 0, sizeof(gsi_xfer[0]) * num_desc); Loading Loading @@ -1302,6 +1307,7 @@ int ipa3_tx_dp(enum ipa_client_type dst, struct sk_buff *skb, int num_frags, f; const struct ipa_gsi_ep_config *gsi_ep; int data_idx; unsigned int max_desc; if (unlikely(!ipa3_ctx)) { IPAERR("IPA3 driver was not initialized\n"); Loading Loading @@ -1356,7 +1362,15 @@ int ipa3_tx_dp(enum ipa_client_type dst, struct sk_buff *skb, * 1 descriptor needed for the linear portion of skb. */ gsi_ep = ipa3_get_gsi_ep_info(ipa3_ctx->ep[src_ep_idx].client); if (gsi_ep && (num_frags + 3 > gsi_ep->ipa_if_tlv)) { if (unlikely(gsi_ep == NULL)) { IPAERR("failed to get EP %d GSI info\n", src_ep_idx); goto fail_gen; } max_desc = gsi_ep->ipa_if_tlv; if (gsi_ep->prefetch_mode == GSI_SMART_PRE_FETCH || gsi_ep->prefetch_mode == GSI_FREE_PRE_FETCH) max_desc -= gsi_ep->prefetch_threshold; if (num_frags + 3 > max_desc) { if (skb_linearize(skb)) { IPAERR("Failed to linear skb with %d frags\n", num_frags); Loading Loading @@ -3250,7 +3264,7 @@ int ipa3_tx_dp_mul(enum ipa_client_type src, desc[1].callback = ipa3_tx_client_rx_pkt_status; } IPADBG_LOW("calling ipa3_send_one()\n"); IPADBG_LOW("calling ipa3_send()\n"); if (ipa3_send(sys, 2, desc, true)) { IPAERR("fail to send skb\n"); sys->ep->wstats.rx_pkt_leak += (cnt-1); Loading drivers/platform/msm/ipa/ipa_v3/ipa_utils.c +7 −7 Original line number Diff line number Diff line Loading @@ -2059,7 +2059,7 @@ static const struct ipa_ep_configuration ipa3_ep_mapping false, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 11, 14, 8, 16, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } }, { 11, 14, 10, 16, IPA_EE_AP, GSI_SMART_PRE_FETCH, 2 } }, [IPA_4_5][IPA_CLIENT_APPS_WAN_PROD] = { true, IPA_v4_5_GROUP_UL_DL, true, Loading @@ -2071,13 +2071,13 @@ static const struct ipa_ep_configuration ipa3_ep_mapping false, IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY, QMB_MASTER_SELECT_DDR, { 7, 9, 20, 24, IPA_EE_AP, GSI_SMART_PRE_FETCH, 8 } }, { 7, 9, 20, 24, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } }, [IPA_4_5][IPA_CLIENT_ODU_PROD] = { true, IPA_v4_5_GROUP_UL_DL, true, IPA_DPS_HPS_REP_SEQ_TYPE_2PKT_PROC_PASS_NO_DEC_UCP_DMAP, QMB_MASTER_SELECT_DDR, { 1, 0, 8, 16, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } }, { 1, 0, 16, 20, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } }, [IPA_4_5][IPA_CLIENT_ETHERNET_PROD] = { true, IPA_v4_5_GROUP_UL_DL, true, Loading @@ -2101,7 +2101,7 @@ static const struct ipa_ep_configuration ipa3_ep_mapping true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_DEC_UCP, QMB_MASTER_SELECT_DDR, { 8, 2, 24, 32, IPA_EE_Q6, GSI_FREE_PRE_FETCH, 5 } }, { 8, 2, 27, 32, IPA_EE_Q6, GSI_FREE_PRE_FETCH, 3 } }, /* Only for test purpose */ [IPA_4_5][IPA_CLIENT_TEST_PROD] = { true, IPA_v4_5_GROUP_UL_DL, Loading Loading @@ -2252,7 +2252,7 @@ static const struct ipa_ep_configuration ipa3_ep_mapping false, IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY, QMB_MASTER_SELECT_DDR, { 7, 9, 20, 24, IPA_EE_AP, GSI_SMART_PRE_FETCH, 8 } }, { 7, 9, 20, 24, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } }, [IPA_4_5_MHI][IPA_CLIENT_Q6_WAN_PROD] = { true, IPA_v4_5_MHI_GROUP_DDR, true, Loading @@ -2270,13 +2270,13 @@ static const struct ipa_ep_configuration ipa3_ep_mapping true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_DEC_UCP, QMB_MASTER_SELECT_DDR, { 8, 2, 24, 32, IPA_EE_Q6, GSI_FREE_PRE_FETCH, 5 } }, { 8, 2, 27, 32, IPA_EE_Q6, GSI_FREE_PRE_FETCH, 3 } }, [IPA_4_5_MHI][IPA_CLIENT_Q6_AUDIO_DMA_MHI_PROD] = { true, IPA_v4_5_MHI_GROUP_DMA, false, IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_NO_UCP, QMB_MASTER_SELECT_DDR, { 4, 6, 8, 16, IPA_EE_Q6, GSI_ESCAPE_BUF_ONLY, 0 } }, { 4, 6, 8, 16, IPA_EE_Q6, GSI_SMART_PRE_FETCH, 4 } }, [IPA_4_5_MHI][IPA_CLIENT_MHI_PROD] = { true, IPA_v4_5_MHI_GROUP_PCIE, true, Loading Loading
drivers/platform/msm/ipa/ipa_v3/ipa_dp.c +19 −5 Original line number Diff line number Diff line Loading @@ -294,6 +294,7 @@ int ipa3_send(struct ipa3_sys_context *sys, u32 mem_flag = GFP_ATOMIC; const struct ipa_gsi_ep_config *gsi_ep_cfg; bool send_nop = false; unsigned int max_desc; if (unlikely(!in_atomic)) mem_flag = GFP_KERNEL; Loading @@ -311,14 +312,18 @@ int ipa3_send(struct ipa3_sys_context *sys, return -EPERM; } if (unlikely(num_desc > gsi_ep_cfg->ipa_if_tlv)) { max_desc = gsi_ep_cfg->ipa_if_tlv; if (gsi_ep_cfg->prefetch_mode == GSI_SMART_PRE_FETCH || gsi_ep_cfg->prefetch_mode == GSI_FREE_PRE_FETCH) max_desc -= gsi_ep_cfg->prefetch_threshold; if (unlikely(num_desc > max_desc)) { IPAERR("Too many chained descriptors need=%d max=%d\n", num_desc, gsi_ep_cfg->ipa_if_tlv); num_desc, max_desc); WARN_ON(1); return -EPERM; } /* initialize only the xfers we use */ memset(gsi_xfer, 0, sizeof(gsi_xfer[0]) * num_desc); Loading Loading @@ -1302,6 +1307,7 @@ int ipa3_tx_dp(enum ipa_client_type dst, struct sk_buff *skb, int num_frags, f; const struct ipa_gsi_ep_config *gsi_ep; int data_idx; unsigned int max_desc; if (unlikely(!ipa3_ctx)) { IPAERR("IPA3 driver was not initialized\n"); Loading Loading @@ -1356,7 +1362,15 @@ int ipa3_tx_dp(enum ipa_client_type dst, struct sk_buff *skb, * 1 descriptor needed for the linear portion of skb. */ gsi_ep = ipa3_get_gsi_ep_info(ipa3_ctx->ep[src_ep_idx].client); if (gsi_ep && (num_frags + 3 > gsi_ep->ipa_if_tlv)) { if (unlikely(gsi_ep == NULL)) { IPAERR("failed to get EP %d GSI info\n", src_ep_idx); goto fail_gen; } max_desc = gsi_ep->ipa_if_tlv; if (gsi_ep->prefetch_mode == GSI_SMART_PRE_FETCH || gsi_ep->prefetch_mode == GSI_FREE_PRE_FETCH) max_desc -= gsi_ep->prefetch_threshold; if (num_frags + 3 > max_desc) { if (skb_linearize(skb)) { IPAERR("Failed to linear skb with %d frags\n", num_frags); Loading Loading @@ -3250,7 +3264,7 @@ int ipa3_tx_dp_mul(enum ipa_client_type src, desc[1].callback = ipa3_tx_client_rx_pkt_status; } IPADBG_LOW("calling ipa3_send_one()\n"); IPADBG_LOW("calling ipa3_send()\n"); if (ipa3_send(sys, 2, desc, true)) { IPAERR("fail to send skb\n"); sys->ep->wstats.rx_pkt_leak += (cnt-1); Loading
drivers/platform/msm/ipa/ipa_v3/ipa_utils.c +7 −7 Original line number Diff line number Diff line Loading @@ -2059,7 +2059,7 @@ static const struct ipa_ep_configuration ipa3_ep_mapping false, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 11, 14, 8, 16, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } }, { 11, 14, 10, 16, IPA_EE_AP, GSI_SMART_PRE_FETCH, 2 } }, [IPA_4_5][IPA_CLIENT_APPS_WAN_PROD] = { true, IPA_v4_5_GROUP_UL_DL, true, Loading @@ -2071,13 +2071,13 @@ static const struct ipa_ep_configuration ipa3_ep_mapping false, IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY, QMB_MASTER_SELECT_DDR, { 7, 9, 20, 24, IPA_EE_AP, GSI_SMART_PRE_FETCH, 8 } }, { 7, 9, 20, 24, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } }, [IPA_4_5][IPA_CLIENT_ODU_PROD] = { true, IPA_v4_5_GROUP_UL_DL, true, IPA_DPS_HPS_REP_SEQ_TYPE_2PKT_PROC_PASS_NO_DEC_UCP_DMAP, QMB_MASTER_SELECT_DDR, { 1, 0, 8, 16, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } }, { 1, 0, 16, 20, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } }, [IPA_4_5][IPA_CLIENT_ETHERNET_PROD] = { true, IPA_v4_5_GROUP_UL_DL, true, Loading @@ -2101,7 +2101,7 @@ static const struct ipa_ep_configuration ipa3_ep_mapping true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_DEC_UCP, QMB_MASTER_SELECT_DDR, { 8, 2, 24, 32, IPA_EE_Q6, GSI_FREE_PRE_FETCH, 5 } }, { 8, 2, 27, 32, IPA_EE_Q6, GSI_FREE_PRE_FETCH, 3 } }, /* Only for test purpose */ [IPA_4_5][IPA_CLIENT_TEST_PROD] = { true, IPA_v4_5_GROUP_UL_DL, Loading Loading @@ -2252,7 +2252,7 @@ static const struct ipa_ep_configuration ipa3_ep_mapping false, IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY, QMB_MASTER_SELECT_DDR, { 7, 9, 20, 24, IPA_EE_AP, GSI_SMART_PRE_FETCH, 8 } }, { 7, 9, 20, 24, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } }, [IPA_4_5_MHI][IPA_CLIENT_Q6_WAN_PROD] = { true, IPA_v4_5_MHI_GROUP_DDR, true, Loading @@ -2270,13 +2270,13 @@ static const struct ipa_ep_configuration ipa3_ep_mapping true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_DEC_UCP, QMB_MASTER_SELECT_DDR, { 8, 2, 24, 32, IPA_EE_Q6, GSI_FREE_PRE_FETCH, 5 } }, { 8, 2, 27, 32, IPA_EE_Q6, GSI_FREE_PRE_FETCH, 3 } }, [IPA_4_5_MHI][IPA_CLIENT_Q6_AUDIO_DMA_MHI_PROD] = { true, IPA_v4_5_MHI_GROUP_DMA, false, IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_NO_UCP, QMB_MASTER_SELECT_DDR, { 4, 6, 8, 16, IPA_EE_Q6, GSI_ESCAPE_BUF_ONLY, 0 } }, { 4, 6, 8, 16, IPA_EE_Q6, GSI_SMART_PRE_FETCH, 4 } }, [IPA_4_5_MHI][IPA_CLIENT_MHI_PROD] = { true, IPA_v4_5_MHI_GROUP_PCIE, true, Loading