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Commit 07ad6836 authored by Sebastian Hesselbarth's avatar Sebastian Hesselbarth Committed by Jason Cooper
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clk: mvebu: armada-370: maintain clock init order



Init order of CLK_OF_DECLARE'd drivers depends on compile order.
Unfortunately, clk_of_init does not allow drivers to return errors,
e.g. -EPROBE_DEFER if parent clocks have not been registered, yet.

To avoid init order woes for MVEBU clock drivers, we take care of
proper init order ourselves. This patch joins core-clk and gating-clk
init to maintain proper init order.

Signed-off-by: default avatarSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: default avatarEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent 38dbfb59
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+10 −11
Original line number Diff line number Diff line
@@ -141,13 +141,6 @@ static const struct coreclk_soc_desc a370_coreclks = {
	.num_ratios = ARRAY_SIZE(a370_coreclk_ratios),
};

static void __init a370_coreclk_init(struct device_node *np)
{
	mvebu_coreclk_setup(np, &a370_coreclks);
}
CLK_OF_DECLARE(a370_core_clk, "marvell,armada-370-core-clock",
	       a370_coreclk_init);

/*
 * Clock Gating Control
 */
@@ -168,9 +161,15 @@ static const struct clk_gating_soc_desc a370_gating_desc[] __initconst = {
	{ }
};

static void __init a370_clk_gating_init(struct device_node *np)
static void __init a370_clk_init(struct device_node *np)
{
	mvebu_clk_gating_setup(np, a370_gating_desc);
	struct device_node *cgnp =
		of_find_compatible_node(NULL, NULL, "marvell,armada-370-gating-clock");

	mvebu_coreclk_setup(np, &a370_coreclks);

	if (cgnp)
		mvebu_clk_gating_setup(cgnp, a370_gating_desc);
}
CLK_OF_DECLARE(a370_clk_gating, "marvell,armada-370-gating-clock",
	       a370_clk_gating_init);
CLK_OF_DECLARE(a370_clk, "marvell,armada-370-core-clock", a370_clk_init);