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Commit 07600578 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add EMAC node for auto platform"

parents b7a85f4d ad19e73f

Documentation/devicetree/bindings/net/qcom,emac-dwc-eqos.txt

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Qualcomm Technologies Inc. EMAC Gigabit Ethernet controller



This network controller consists of the MAC and

RGMII IO Macro for interfacing with PHY.



Required properties:



emac_hw node:

- compatible: Should be "qcom,emac-dwc-eqos"

- reg: Offset and length of the register regions for the mac and io-macro

- interrupts: Interrupt number used by this controller

- io-macro-info: Internal io-macro-info

- emac_emb_smmu: Internal emac smmu node



Optional:

- qcom,msm-bus,name: String representing the client-name

- qcom,msm-bus,num-cases: Total number of usecases

- qcom,msm-bus,num-paths: Total number of master-slave pairs

- qcom,msm-bus,vectors-KBps: Arrays of unsigned integers representing:

                             master-id, slave-id, arbitrated bandwidth

                             in KBps, instantaneous bandwidth in KBps

qcom,bus-vector-names: specifies string IDs for the corresponding bus vectors

                       in the same order as qcom,msm-bus,vectors-KBps property.

- qcom,arm-smmu: Boolean, if present enables EMAC SMMU support in sdxpoorwills.



Internal io-macro-info:

- io-macro-bypass-mode: <0 or 1> internal or external delay configuration

- io-interface: <rgmii/mii/rmii> PHY interface used



Internal emac_emb_smmu:

- compatible: Should be "qcom,emac-smmu-embedded".

- qcom,smmu-s1-bypass: Boolean, if present S1 bypass is enabled.

- iommus: Includes the <&smmu_phandle stream_id size> pair for each context

			bank.

- qcom,iova-mapping: <starting_address size> of the smmu context bank.



Example:



soc {

	emac_hw: qcom,emac@00020000 {

			compatible = "qcom,emac-dwc-eqos";

			qcom,arm-smmu;

			reg = <0x20000 0x10000>,

				  <0x36000 0x100>;

				  <0x3D00000 0x300000>;

			reg-names = "emac-base", "rgmii-base";

			interrupts = <0 62 4>, <0 60 4>,

					<0 49 4>, <0 50 4>,

					<0 51 4>, <0 52 4>,

					<0 53 4>, <0 54 4>,

					<0 55 4>, <0 56 4>,

					<0 57 4>;

			interrupt-names = "sbd-intr", "lpi-intr",

				 "phy-intr", "tx-ch0-intr",

				 "tx-ch1-intr", "tx-ch2-intr",

				 "tx-ch3-intr", "tx-ch4-intr",

				 "rx-ch0-intr", "rx-ch1-intr",

				 "rx-ch2-intr", "rx-ch3-intr";

			qcom,msm-bus,name = "emac";

			qcom,msm-bus,num-cases = <4>;

			qcom,msm-bus,num-paths = <2>;

			qcom,msm-bus,vectors-KBps =

				<98 512 0 0>, <1 781 0 0>, /* No vote */

				<98 512 1250 0>, <1 781 0 40000>,  /* 10Mbps vote */

				<98 512 12500 0>, <1 781 0 40000>,  /* 100Mbps vote */

				<98 512 125000 0>, <1 781 0 40000>; /* 1000Mbps vote */

			qcom,bus-vector-names = "10", "100", "1000";

			clock-names = "emac_axi_clk", "emac_ptp_clk",

				"emac_rgmii_clk", "emac_slv_ahb_clk";

			qcom,phy-reset = <&tlmm 79 GPIO_ACTIVE_HIGH>;

			qcom,phy-intr-redirect = <&tlmm 124 GPIO_ACTIVE_LOW>;

			gdsc_emac-supply = <&emac_gdsc>;



			io-macro-info {

				io-macro-bypass-mode = <0>;

				io-interface = "rgmii";

			};



			emac_emb_smmu: emac_emb_smmu {

				compatible = "qcom,emac-smmu-embedded";

				qcom,smmu-s1-bypass;

				iommus = <&apps_smmu 0x3C0 0x0>;

				qcom,iova-mapping = <0x80000000 0x40000000>;

			};

		};

}

arch/arm64/boot/dts/qcom/sa8155.dtsi

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&mdss_mdp {

	connectors = <&dsi_dp1 &dsi_dp2 &sde_dp &sde_wb>;

};



#include <dt-bindings/gpio/gpio.h>



&soc {

	emac_hw: qcom,emac@00020000 {

		compatible = "qcom,emac-dwc-eqos";

		qcom,arm-smmu;

		emac-core-version = <2>;

		reg = <0x20000 0x10000>,

			<0x36000 0x100>,

			<0x3D00000 0x300000>;

		reg-names = "emac-base", "rgmii-base", "tlmm-central-base";

		interrupts-extended = <&pdc 0 689 4>, <&pdc 0 699 4>,

			<&tlmm 124 2>, <&pdc 0 691 4>,

			<&pdc 0 692 4>, <&pdc 0 693 4>,

			<&pdc 0 694 4>, <&pdc 0 695 4>,

			<&pdc 0 696 4>, <&pdc 0 697 4>,

			<&pdc 0 698 4>, <&pdc 0 699 4>;

		interrupt-names = "sbd-intr", "lpi-intr",

			"phy-intr", "tx-ch0-intr",

			"tx-ch1-intr", "tx-ch2-intr",

			"tx-ch3-intr", "tx-ch4-intr",

			"rx-ch0-intr", "rx-ch1-intr",

			"rx-ch2-intr", "rx-ch3-intr";

		qcom,msm-bus,name = "emac";

		qcom,msm-bus,num-cases = <4>;

		qcom,msm-bus,num-paths = <2>;

		qcom,msm-bus,vectors-KBps =

			<98 512 0 0>, <1 781 0 0>, /* No vote */

			<98 512 1250 0>, <1 781 0 40000>, /* 10Mbps vote */

			<98 512 12500 0>, <1 781 0 40000>, /* 100Mbps vote */

			<98 512 125000 0>, <1 781 0 40000>; /* 1000Mbps vote */

		qcom,bus-vector-names = "10", "100", "1000";

		clocks = <&clock_gcc GCC_EMAC_AXI_CLK>,

			<&clock_gcc GCC_EMAC_PTP_CLK>,

			<&clock_gcc GCC_EMAC_RGMII_CLK>,

			<&clock_gcc GCC_EMAC_SLV_AHB_CLK>;

		clock-names = "emac_axi_clk", "emac_ptp_clk",

			"emac_rgmii_clk", "emac_slv_ahb_clk";

		qcom,phy-reset = <&tlmm 79 GPIO_ACTIVE_HIGH>;

		qcom,phy-intr-redirect = <&tlmm 124 GPIO_ACTIVE_LOW>;

		gdsc_emac-supply = <&emac_gdsc>;

		pinctrl-names = "dev-emac-mdc",

			"dev-emac-mdio",

			"dev-emac-rgmii_txd0_state",

			"dev-emac-rgmii_txd1_state",

			"dev-emac-rgmii_txd2_state",

			"dev-emac-rgmii_txd3_state",

			"dev-emac-rgmii_txc_state",

			"dev-emac-rgmii_tx_ctl_state",

			"dev-emac-rgmii_rxd0_state",

			"dev-emac-rgmii_rxd1_state",

			"dev-emac-rgmii_rxd2_state",

			"dev-emac-rgmii_rxd3_state",

			"dev-emac-rgmii_rxc_state",

			"dev-emac-rgmii_rx_ctl_state";



		pinctrl-0 = <&emac_mdc>;

		pinctrl-1 = <&emac_mdio>;



		pinctrl-2 = <&emac_rgmii_txd0>;

		pinctrl-3 = <&emac_rgmii_txd1>;

		pinctrl-4 = <&emac_rgmii_txd2>;

		pinctrl-5 = <&emac_rgmii_txd3>;

		pinctrl-6 = <&emac_rgmii_txc>;

		pinctrl-7 = <&emac_rgmii_tx_ctl>;



		pinctrl-8 = <&emac_rgmii_rxd0>;

		pinctrl-9 = <&emac_rgmii_rxd1>;

		pinctrl-10 = <&emac_rgmii_rxd2>;

		pinctrl-11 = <&emac_rgmii_rxd3>;

		pinctrl-12 = <&emac_rgmii_rxc>;

		pinctrl-13 = <&emac_rgmii_rx_ctl>;



		io-macro-info {

			io-macro-bypass-mode = <0>;

			io-interface = "rgmii";

		};

		emac_emb_smmu: emac_emb_smmu {

			compatible = "qcom,emac-smmu-embedded";

			qcom,smmu-s1-bypass;

			iommus = <&apps_smmu 0x3C0 0x0>;

			qcom,iova-mapping = <0x80000000 0x40000000>;

		};

	};

};

arch/arm64/boot/dts/qcom/sm8150-pinctrl.dtsi

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				bias-pull-up;

			};

		};



		emac {

			emac_mdc: emac_mdc {

				mux {

					pins = "gpio7";

					function = "rgmii_mdc";

				};



				config {

					pins = "gpio7";

					bias-pull-up;

				};

			};

			emac_mdio: emac_mdio {

				mux {

					pins = "gpio59";

					function = "rgmii_mdio";

				};



				config {

					pins = "gpio59";

					bias-pull-up;

				};

			};



			emac_rgmii_txd0: emac_rgmii_txd0 {

				mux {

					pins = "gpio122";

					function = "rgmii_txd0";

				};



				config {

					pins = "gpio122";

					bias-pull-up;

					drive-strength = <16>;

				};

			};



			emac_rgmii_txd1: emac_rgmii_txd1 {

				mux {

					pins = "gpio4";

					function = "rgmii_txd1";

				};



				config {

					pins = "gpio4";

					bias-pull-up;

					drive-strength = <16>;

				};

			};



			emac_rgmii_txd2: emac_rgmii_txd2 {

				mux {

					pins = "gpio5";

					function = "rgmii_txd2";

				};



				config {

					pins = "gpio5";

					bias-pull-up;

					drive-strength = <16>;

				};

			};

			emac_rgmii_txd3: emac_rgmii_txd3 {

				mux {

					pins = "gpio6";

					function = "rgmii_txd3";

				};



				config {

					pins = "gpio6";

					bias-pull-up;

					drive-strength = <16>;

				};

			};

			emac_rgmii_txc: emac_rgmii_txc {

				mux {

					pins = "gpio114";

					function = "rgmii_txc";

				};



				config {

					pins = "gpio114";

					bias-pull-up;

					drive-strength = <16>;

				};

			};

			emac_rgmii_tx_ctl: emac_rgmii_tx_ctl {

				mux {

					pins = "gpio121";

					function = "rgmii_tx";

				};



				config {

					pins = "gpio121";

					bias-pull-up;

					drive-strength = <16>;

				};

			};





			emac_rgmii_rxd0: emac_rgmii_rxd0 {

				mux {

					pins = "gpio117";

					function = "rgmii_rxd0";

				};



				config {

					pins = "gpio117";

					bias-disable;  /* NO pull */

					drive-strength = <2>;  /* 2MA */

				};

			};



			emac_rgmii_rxd1: emac_rgmii_rxd1 {

				mux {

					pins = "gpio118";

					function = "rgmii_rxd1";

				};



				config {

					pins = "gpio118";

					bias-disable;  /* NO pull */

					drive-strength = <2>;

				};

			};



			emac_rgmii_rxd2: emac_rgmii_rxd2 {

				mux {

					pins = "gpio119";

					function = "rgmii_rxd2";

				};



				config {

					pins = "gpio119";

					bias-disable;	/* NO pull */

					drive-strength = <2>;

				};

			};

			emac_rgmii_rxd3: emac_rgmii_rxd3 {

				mux {

					pins = "gpio120";

					function = "rgmii_rxd3";

				};



				config {

					pins = "gpio120";

					bias-disable;	/* NO pull */

					drive-strength = <2>;

				};

			};

			emac_rgmii_rxc: emac_rgmii_rxc {

				mux {

					pins = "gpio115";

					function = "rgmii_rxc";

				};



				config {

					pins = "gpio115";

					bias-disable;	/* NO pull */

					drive-strength = <2>;

				};

			};

			emac_rgmii_rx_ctl: emac_rgmii_rx_ctl {

				mux {

					pins = "gpio116";

					function = "rgmii_rx";

				};



				config {

					pins = "gpio116";

					bias-disable;  /* NO pull */

					drive-strength = <2>;

				};

			};

		};

	};

};