Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 074a8c0d authored by Felix Fietkau's avatar Felix Fietkau Committed by John W. Linville
Browse files

ath9k: add support for Tx and Rx STBC



Supported only for single stream rates by the hardware

Signed-off-by: default avatarFelix Fietkau <nbd@openwrt.org>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent f79d9bad
Loading
Loading
Loading
Loading
+6 −0
Original line number Diff line number Diff line
@@ -214,6 +214,12 @@ static void setup_ht_cap(struct ath_softc *sc,
	else
		max_streams = 2;

	if (AR_SREV_9280_10_OR_LATER(ah)) {
		if (max_streams >= 2)
			ht_info->cap |= IEEE80211_HT_CAP_TX_STBC;
		ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
	}

	/* set up supported mcs set */
	memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
	tx_streams = count_streams(common->tx_chainmask, max_streams);
+7 −1
Original line number Diff line number Diff line
@@ -37,6 +37,8 @@
	  AR_2040_##_index : 0)						\
	 |((_series)[_index].RateFlags & ATH9K_RATESERIES_HALFGI ?	\
	   AR_GI##_index : 0)						\
	 |((_series)[_index].RateFlags & ATH9K_RATESERIES_STBC ?	\
	   AR_STBC##_index : 0)						\
	 |SM((_series)[_index].ChSel, AR_ChainSel##_index))

#define CCK_SIFS_TIME        10
@@ -434,7 +436,10 @@ struct ar5416_desc {
#define AR_ChainSel3_S      17
#define AR_RTSCTSRate       0x0ff00000
#define AR_RTSCTSRate_S     20
#define AR_TxCtlRsvd70      0xf0000000
#define AR_STBC0            0x10000000
#define AR_STBC1            0x20000000
#define AR_STBC2            0x40000000
#define AR_STBC3            0x80000000

#define AR_TxRSSIAnt00      0x000000ff
#define AR_TxRSSIAnt00_S    0
@@ -647,6 +652,7 @@ enum ath9k_rx_filter {
#define ATH9K_RATESERIES_RTS_CTS  0x0001
#define ATH9K_RATESERIES_2040     0x0002
#define ATH9K_RATESERIES_HALFGI   0x0004
#define ATH9K_RATESERIES_STBC     0x0008

struct ath9k_11n_rate_series {
	u32 Tries;
+2 −0
Original line number Diff line number Diff line
@@ -1607,6 +1607,8 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf)
			series[i].Rate = rix | 0x80;
			series[i].PktDuration = ath_pkt_duration(sc, rix, bf,
				 is_40, is_sgi, is_sp);
			if (rix < 8 && (tx_info->flags & IEEE80211_TX_CTL_STBC))
				series[i].RateFlags |= ATH9K_RATESERIES_STBC;
			continue;
		}