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Commit 06b8216a authored by Sandeep Panda's avatar Sandeep Panda Committed by Tharun Raj Soma
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drm/msm/dsi-staging: add support to set continuous clock 



Some display panels have the requirement of continuous
clock setting. This change adds support to parse the same
from panel dt file and configure the DSI controller to
force the clock lane to HS mode always.

Change-Id: Ia3da4ca87de21de201bbe3677ee36b5fa473bf8e
Signed-off-by: default avatarSandeep Panda <spanda@codeaurora.org>
Signed-off-by: default avatarTharun Raj Soma <tsoma@codeaurora.org>
parent b0e5566f

drivers/gpu/drm/msm/dsi-staging/dsi_catalog.c

+1 −0
Original line number Diff line number Diff line
@@ -70,6 +70,7 @@ static void dsi_catalog_cmn_init(struct dsi_ctrl_hw *ctrl, 
	ctrl->ops.wait_for_cmd_mode_mdp_idle =

		dsi_ctrl_hw_cmn_wait_for_cmd_mode_mdp_idle;

	ctrl->ops.setup_avr = dsi_ctrl_hw_cmn_setup_avr;

	ctrl->ops.set_continuous_clk = dsi_ctrl_hw_cmn_set_continuous_clk;



	switch (version) {

	case DSI_CTRL_VERSION_1_4:

drivers/gpu/drm/msm/dsi-staging/dsi_catalog.h

+2 −0
Original line number Diff line number Diff line
@@ -245,4 +245,6 @@ bool dsi_ctrl_hw_22_get_cont_splash_status(struct dsi_ctrl_hw *ctrl); 
void dsi_ctrl_hw_22_config_clk_gating(struct dsi_ctrl_hw *ctrl, bool enable,

		enum dsi_clk_gate_type clk_selection);



void dsi_ctrl_hw_cmn_set_continuous_clk(struct dsi_ctrl_hw *ctrl, bool enable);



#endif /* _DSI_CATALOG_H_ */

drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c

+10 −0
Original line number Diff line number Diff line
@@ -2712,6 +2712,16 @@ void dsi_ctrl_isr_configure(struct dsi_ctrl *dsi_ctrl, bool enable) 
	mutex_unlock(&dsi_ctrl->ctrl_lock);

}



void dsi_ctrl_set_continuous_clk(struct dsi_ctrl *dsi_ctrl, bool enable)

{

	if (!dsi_ctrl)

		return;



	mutex_lock(&dsi_ctrl->ctrl_lock);

	dsi_ctrl->hw.ops.set_continuous_clk(&dsi_ctrl->hw, enable);

	mutex_unlock(&dsi_ctrl->ctrl_lock);

}



int dsi_ctrl_soft_reset(struct dsi_ctrl *dsi_ctrl)

{

	if (!dsi_ctrl)

drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.h

+7 −0
Original line number Diff line number Diff line
@@ -793,4 +793,11 @@ int dsi_ctrl_update_host_init_state(struct dsi_ctrl *dsi_ctrl, bool en); 
 * dsi_ctrl_pixel_format_to_bpp() - returns number of bits per pxl

 */

int dsi_ctrl_pixel_format_to_bpp(enum dsi_pixel_format dst_format);



/**

 * dsi_ctrl_set_continuous_clk() - API to set/unset force clock lane HS request.

 * @dsi_ctrl:                      DSI controller handle.

 * @enable:			   variable to control continuous clock.

 */

void dsi_ctrl_set_continuous_clk(struct dsi_ctrl *dsi_ctrl, bool enable);

#endif /* _DSI_CTRL_H_ */

drivers/gpu/drm/msm/dsi-staging/dsi_ctrl_hw.h

+7 −0
Original line number Diff line number Diff line
@@ -822,6 +822,13 @@ struct dsi_ctrl_hw_ops { 
	 * @ctrl:         Pointer to the controller host hardware.

	 */

	int (*wait_for_cmd_mode_mdp_idle)(struct dsi_ctrl_hw *ctrl);



	/**

	 * hw.ops.set_continuous_clk() - Set continuous clock

	 * @ctrl:         Pointer to the controller host hardware.

	 * @enable:	  Bool to control continuous clock request.

	 */

	void (*set_continuous_clk)(struct dsi_ctrl_hw *ctrl, bool enable);

};



/*