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Commit 05f9a5bc authored by Ilia Mirkin's avatar Ilia Mirkin Committed by Ben Skeggs
Browse files

drm/nouveau/bsp/nv84: initial vp2 engine implementation 



Signed-off-by: default avatarIlia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent a0376b14

drivers/gpu/drm/nouveau/core/engine/bsp/nv84.c

+13 −14
Original line number Diff line number Diff line
@@ -19,24 +19,19 @@ 
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 * Authors: Ben Skeggs

 * Authors: Ben Skeggs, Ilia Mirkin

 */



#include <core/engctx.h>

#include <core/class.h>



#include <engine/xtensa.h>

#include <engine/bsp.h>



struct nv84_bsp_priv {

	struct nouveau_engine base;

};



/*******************************************************************************

 * BSP object classes

 ******************************************************************************/



static struct nouveau_oclass

nv84_bsp_sclass[] = {

	{ 0x74b0, &nouveau_object_ofuncs },

	{},

};
@@ -48,7 +43,7 @@ static struct nouveau_oclass 
nv84_bsp_cclass = {

	.handle = NV_ENGCTX(BSP, 0x84),

	.ofuncs = &(struct nouveau_ofuncs) {

		.ctor = _nouveau_engctx_ctor,

		.ctor = _nouveau_xtensa_engctx_ctor,

		.dtor = _nouveau_engctx_dtor,

		.init = _nouveau_engctx_init,

		.fini = _nouveau_engctx_fini,
@@ -66,10 +61,10 @@ nv84_bsp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	      struct nouveau_oclass *oclass, void *data, u32 size,

	      struct nouveau_object **pobject)

{

	struct nv84_bsp_priv *priv;

	struct nouveau_xtensa *priv;

	int ret;



	ret = nouveau_engine_create(parent, engine, oclass, true,

	ret = nouveau_xtensa_create(parent, engine, oclass, 0x103000, true,

				    "PBSP", "bsp", &priv);

	*pobject = nv_object(priv);

	if (ret)
@@ -78,6 +73,8 @@ nv84_bsp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	nv_subdev(priv)->unit = 0x04008000;

	nv_engine(priv)->cclass = &nv84_bsp_cclass;

	nv_engine(priv)->sclass = nv84_bsp_sclass;

	priv->fifo_val = 0x1111;

	priv->unkd28 = 0x90044;

	return 0;

}
@@ -86,8 +83,10 @@ nv84_bsp_oclass = { 
	.handle = NV_ENGINE(BSP, 0x84),

	.ofuncs = &(struct nouveau_ofuncs) {

		.ctor = nv84_bsp_ctor,

		.dtor = _nouveau_engine_dtor,

		.init = _nouveau_engine_init,

		.fini = _nouveau_engine_fini,

		.dtor = _nouveau_xtensa_dtor,

		.init = _nouveau_xtensa_init,

		.fini = _nouveau_xtensa_fini,

		.rd32 = _nouveau_xtensa_rd32,

		.wr32 = _nouveau_xtensa_wr32,

	},

};

drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c

+2 −0
Original line number Diff line number Diff line
@@ -58,6 +58,7 @@ nv84_fifo_context_attach(struct nouveau_object *parent, 
	case NVDEV_ENGINE_GR   : addr = 0x0020; break;

	case NVDEV_ENGINE_VP   : addr = 0x0040; break;

	case NVDEV_ENGINE_MPEG : addr = 0x0060; break;

	case NVDEV_ENGINE_BSP  : addr = 0x0080; break;

	case NVDEV_ENGINE_CRYPT: addr = 0x00a0; break;

	case NVDEV_ENGINE_COPY0: addr = 0x00c0; break;

	default:
@@ -92,6 +93,7 @@ nv84_fifo_context_detach(struct nouveau_object *parent, bool suspend, 
	case NVDEV_ENGINE_GR   : engn = 0; addr = 0x0020; break;

	case NVDEV_ENGINE_VP   : engn = 3; addr = 0x0040; break;

	case NVDEV_ENGINE_MPEG : engn = 1; addr = 0x0060; break;

	case NVDEV_ENGINE_BSP  : engn = 5; addr = 0x0080; break;

	case NVDEV_ENGINE_CRYPT: engn = 4; addr = 0x00a0; break;

	case NVDEV_ENGINE_COPY0: engn = 2; addr = 0x00c0; break;

	default:

drivers/gpu/drm/nouveau/core/subdev/vm/nv50.c

+1 −0
Original line number Diff line number Diff line
@@ -175,6 +175,7 @@ nv50_vm_flush(struct nouveau_vm *vm) 
		case NVDEV_ENGINE_VP   : vme = 0x01; break;

		case NVDEV_SUBDEV_BAR  : vme = 0x06; break;

		case NVDEV_ENGINE_MPEG : vme = 0x08; break;

		case NVDEV_ENGINE_BSP  : vme = 0x09; break;

		case NVDEV_ENGINE_CRYPT: vme = 0x0a; break;

		case NVDEV_ENGINE_COPY0: vme = 0x0d; break;

		default: