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Commit 05993823 authored by Narender Ankam's avatar Narender Ankam
Browse files

clk: qcom: mdss: add support for HDMI 28LPM PLL 



Add HDMI 28LPM PLL driver to drive HDMI PLL clks
on qcs405 target.

Change-Id: Id46f3138e03fc3517c40ba160f1ac4c72620bab0
Signed-off-by: default avatarNarender Ankam <nankam@codeaurora.org>
parent 1cef27dd

Documentation/devicetree/bindings/fb/mdss-pll.txt

+1 −1
Original line number Diff line number Diff line
@@ -19,7 +19,7 @@ Required properties: 
                        "qcom,mdss_hdmi_pll_8998", "qcom,mdss_dp_pll_10nm",

                        "qcom,mdss_dsi_pll_7nm",   "qcom,mdss_dp_pll_7nm",

			"qcom,mdss_dsi_pll_28lpm", "qcom,mdss_dsi_pll_14nm",

			"qcom,mdss_dp_pll_14nm"

			"qcom,mdss_dp_pll_14nm", "qcom,mdss_hdmi_pll_28lpm"

- cell-index:		Specifies the controller used

- reg:			offset and length of the register set for the device.

- reg-names :		names to refer to register sets related to this device

drivers/clk/qcom/mdss/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -11,3 +11,4 @@ obj-$(CONFIG_QCOM_MDSS_PLL) += mdss-dsi-pll-28nm-util.o 
obj-$(CONFIG_QCOM_MDSS_PLL) += mdss-dsi-pll-14nm.o

obj-$(CONFIG_QCOM_MDSS_PLL) += mdss-dsi-pll-14nm-util.o

obj-$(CONFIG_QCOM_MDSS_PLL) += mdss-dp-pll-14nm.o

obj-$(CONFIG_QCOM_MDSS_PLL) += mdss-hdmi-pll-28lpm.o

drivers/clk/qcom/mdss/mdss-hdmi-pll-28lpm.c

0 → 100644
+782 −0

File added.

Preview size limit exceeded, changes collapsed.

drivers/clk/qcom/mdss/mdss-hdmi-pll.h

+7 −4
Original line number Diff line number Diff line 
/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.

/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -19,6 +19,7 @@ struct hdmi_pll_cfg { 
};



struct hdmi_pll_vco_clk {

	struct clk_hw	hw;

	unsigned long	rate;	/* current vco rate */

	unsigned long	min_rate;	/* min vco rate */

	unsigned long	max_rate;	/* max vco rate */
@@ -30,14 +31,16 @@ struct hdmi_pll_vco_clk { 
	struct hdmi_pll_cfg *crctrl;

	void		*priv;



	struct clk	c;

};



static inline struct hdmi_pll_vco_clk *to_hdmi_vco_clk(struct clk *clk)

static inline struct hdmi_pll_vco_clk *to_hdmi_vco_clk_hw(struct clk_hw *hw)

{

	return container_of(clk, struct hdmi_pll_vco_clk, c);

	return container_of(hw, struct hdmi_pll_vco_clk, hw);

}



int hdmi_pll_clock_register_28lpm(struct platform_device *pdev,

				struct mdss_pll_resources *pll_res);



int hdmi_pll_clock_register(struct platform_device *pdev,

				struct mdss_pll_resources *pll_res);

drivers/clk/qcom/mdss/mdss-pll.c

+6 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 
#include "mdss-pll.h"

#include "mdss-dsi-pll.h"

#include "mdss-dp-pll.h"

#include "mdss-hdmi-pll.h"



int mdss_pll_resource_enable(struct mdss_pll_resources *pll_res, bool enable)

{
@@ -139,6 +140,8 @@ static int mdss_pll_resource_parse(struct platform_device *pdev, 
		pll_res->pll_interface_type = MDSS_DSI_PLL_14NM;

	else if (!strcmp(compatible_stream, "qcom,mdss_dp_pll_14nm"))

		pll_res->pll_interface_type = MDSS_DP_PLL_14NM;

	else if (!strcmp(compatible_stream, "qcom,mdss_hdmi_pll_28lpm"))

		pll_res->pll_interface_type = MDSS_HDMI_PLL_28LPM;

	else

		goto err;
@@ -181,6 +184,8 @@ static int mdss_pll_clock_register(struct platform_device *pdev, 
		break;

	case MDSS_DP_PLL_14NM:

		rc = dp_pll_clock_register_14nm(pdev, pll_res);

	case MDSS_HDMI_PLL_28LPM:

		rc = hdmi_pll_clock_register_28lpm(pdev, pll_res);

		break;

	case MDSS_UNKNOWN_PLL:

	default:
@@ -415,6 +420,7 @@ static const struct of_device_id mdss_pll_dt_match[] = { 
	{.compatible = "qcom,mdss_dsi_pll_28lpm"},

	{.compatible = "qcom,mdss_dsi_pll_14nm"},

	{.compatible = "qcom,mdss_dp_pll_14nm"},

	{.compatible = "qcom,mdss_hdmi_pll_28lpm"},

	{}

};