Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 0585a155 authored by Anton Vorontsov's avatar Anton Vorontsov Committed by Kumar Gala
Browse files

powerpc/83xx: Add PCI-E support for all MPC83xx boards with PCI-E 



This patch adds pcie nodes to the appropriate dts files, plus adds
some probing code for the boards.

Also, remove of_device_is_avaliable() check from the mpc837x_mds.c
board file, as mpc83xx_add_bridge() has the same check now.

Signed-off-by: default avatarAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent 598804cd

arch/powerpc/boot/dts/mpc8315erdb.dts

+64 −0
Original line number Diff line number Diff line
@@ -22,6 +22,8 @@ 
		serial0 = &serial0;

		serial1 = &serial1;

		pci0 = &pci0;

		pci1 = &pci1;

		pci2 = &pci2;

	};



	cpus {
@@ -349,4 +351,66 @@ 
		compatible = "fsl,mpc8349-pci";

		device_type = "pci";

	};



	pci1: pcie@e0009000 {

		#address-cells = <3>;

		#size-cells = <2>;

		#interrupt-cells = <1>;

		device_type = "pci";

		compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";

		reg = <0xe0009000 0x00001000>;

		ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000

		          0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;

		bus-range = <0 255>;

		interrupt-map-mask = <0xf800 0 0 7>;

		interrupt-map = <0 0 0 1 &ipic 1 8

				 0 0 0 2 &ipic 1 8

				 0 0 0 3 &ipic 1 8

				 0 0 0 4 &ipic 1 8>;

		clock-frequency = <0>;



		pcie@0 {

			#address-cells = <3>;

			#size-cells = <2>;

			device_type = "pci";

			reg = <0 0 0 0 0>;

			ranges = <0x02000000 0 0xa0000000

				  0x02000000 0 0xa0000000

				  0 0x10000000

				  0x01000000 0 0x00000000

				  0x01000000 0 0x00000000

				  0 0x00800000>;

		};

	};



	pci2: pcie@e000a000 {

		#address-cells = <3>;

		#size-cells = <2>;

		#interrupt-cells = <1>;

		device_type = "pci";

		compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";

		reg = <0xe000a000 0x00001000>;

		ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x10000000

			  0x01000000 0 0x00000000 0xd1000000 0 0x00800000>;

		bus-range = <0 255>;

		interrupt-map-mask = <0xf800 0 0 7>;

		interrupt-map = <0 0 0 1 &ipic 2 8

				 0 0 0 2 &ipic 2 8

				 0 0 0 3 &ipic 2 8

				 0 0 0 4 &ipic 2 8>;

		clock-frequency = <0>;



		pcie@0 {

			#address-cells = <3>;

			#size-cells = <2>;

			device_type = "pci";

			reg = <0 0 0 0 0>;

			ranges = <0x02000000 0 0xc0000000

				  0x02000000 0 0xc0000000

				  0 0x10000000

				  0x01000000 0 0x00000000

				  0x01000000 0 0x00000000

				  0 0x00800000>;

		};

	};

};

arch/powerpc/boot/dts/mpc8377_mds.dts

+64 −0
Original line number Diff line number Diff line
@@ -23,6 +23,8 @@ 
		serial0 = &serial0;

		serial1 = &serial1;

		pci0 = &pci0;

		pci1 = &pci1;

		pci2 = &pci2;

	};



	cpus {
@@ -409,4 +411,66 @@ 
		compatible = "fsl,mpc8349-pci";

		device_type = "pci";

	};



	pci1: pcie@e0009000 {

		#address-cells = <3>;

		#size-cells = <2>;

		#interrupt-cells = <1>;

		device_type = "pci";

		compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";

		reg = <0xe0009000 0x00001000>;

		ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000

		          0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;

		bus-range = <0 255>;

		interrupt-map-mask = <0xf800 0 0 7>;

		interrupt-map = <0 0 0 1 &ipic 1 8

				 0 0 0 2 &ipic 1 8

				 0 0 0 3 &ipic 1 8

				 0 0 0 4 &ipic 1 8>;

		clock-frequency = <0>;



		pcie@0 {

			#address-cells = <3>;

			#size-cells = <2>;

			device_type = "pci";

			reg = <0 0 0 0 0>;

			ranges = <0x02000000 0 0xa8000000

				  0x02000000 0 0xa8000000

				  0 0x10000000

				  0x01000000 0 0x00000000

				  0x01000000 0 0x00000000

				  0 0x00800000>;

		};

	};



	pci2: pcie@e000a000 {

		#address-cells = <3>;

		#size-cells = <2>;

		#interrupt-cells = <1>;

		device_type = "pci";

		compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";

		reg = <0xe000a000 0x00001000>;

		ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000

			  0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;

		bus-range = <0 255>;

		interrupt-map-mask = <0xf800 0 0 7>;

		interrupt-map = <0 0 0 1 &ipic 2 8

				 0 0 0 2 &ipic 2 8

				 0 0 0 3 &ipic 2 8

				 0 0 0 4 &ipic 2 8>;

		clock-frequency = <0>;



		pcie@0 {

			#address-cells = <3>;

			#size-cells = <2>;

			device_type = "pci";

			reg = <0 0 0 0 0>;

			ranges = <0x02000000 0 0xc8000000

				  0x02000000 0 0xc8000000

				  0 0x10000000

				  0x01000000 0 0x00000000

				  0x01000000 0 0x00000000

				  0 0x00800000>;

		};

	};

};

arch/powerpc/boot/dts/mpc8377_rdb.dts

+64 −0
Original line number Diff line number Diff line
@@ -22,6 +22,8 @@ 
		serial0 = &serial0;

		serial1 = &serial1;

		pci0 = &pci0;

		pci1 = &pci1;

		pci2 = &pci2;

	};



	cpus {
@@ -350,4 +352,66 @@ 
		compatible = "fsl,mpc8349-pci";

		device_type = "pci";

	};



	pci1: pcie@e0009000 {

		#address-cells = <3>;

		#size-cells = <2>;

		#interrupt-cells = <1>;

		device_type = "pci";

		compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";

		reg = <0xe0009000 0x00001000>;

		ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000

		          0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;

		bus-range = <0 255>;

		interrupt-map-mask = <0xf800 0 0 7>;

		interrupt-map = <0 0 0 1 &ipic 1 8

				 0 0 0 2 &ipic 1 8

				 0 0 0 3 &ipic 1 8

				 0 0 0 4 &ipic 1 8>;

		clock-frequency = <0>;



		pcie@0 {

			#address-cells = <3>;

			#size-cells = <2>;

			device_type = "pci";

			reg = <0 0 0 0 0>;

			ranges = <0x02000000 0 0xa8000000

				  0x02000000 0 0xa8000000

				  0 0x10000000

				  0x01000000 0 0x00000000

				  0x01000000 0 0x00000000

				  0 0x00800000>;

		};

	};



	pci2: pcie@e000a000 {

		#address-cells = <3>;

		#size-cells = <2>;

		#interrupt-cells = <1>;

		device_type = "pci";

		compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";

		reg = <0xe000a000 0x00001000>;

		ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000

			  0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;

		bus-range = <0 255>;

		interrupt-map-mask = <0xf800 0 0 7>;

		interrupt-map = <0 0 0 1 &ipic 2 8

				 0 0 0 2 &ipic 2 8

				 0 0 0 3 &ipic 2 8

				 0 0 0 4 &ipic 2 8>;

		clock-frequency = <0>;



		pcie@0 {

			#address-cells = <3>;

			#size-cells = <2>;

			device_type = "pci";

			reg = <0 0 0 0 0>;

			ranges = <0x02000000 0 0xc8000000

				  0x02000000 0 0xc8000000

				  0 0x10000000

				  0x01000000 0 0x00000000

				  0x01000000 0 0x00000000

				  0 0x00800000>;

		};

	};

};

arch/powerpc/boot/dts/mpc8378_mds.dts

+64 −0
Original line number Diff line number Diff line
@@ -23,6 +23,8 @@ 
		serial0 = &serial0;

		serial1 = &serial1;

		pci0 = &pci0;

		pci1 = &pci1;

		pci2 = &pci2;

	};



	cpus {
@@ -395,4 +397,66 @@ 
		compatible = "fsl,mpc8349-pci";

		device_type = "pci";

	};



	pci1: pcie@e0009000 {

		#address-cells = <3>;

		#size-cells = <2>;

		#interrupt-cells = <1>;

		device_type = "pci";

		compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";

		reg = <0xe0009000 0x00001000>;

		ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000

		          0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;

		bus-range = <0 255>;

		interrupt-map-mask = <0xf800 0 0 7>;

		interrupt-map = <0 0 0 1 &ipic 1 8

				 0 0 0 2 &ipic 1 8

				 0 0 0 3 &ipic 1 8

				 0 0 0 4 &ipic 1 8>;

		clock-frequency = <0>;



		pcie@0 {

			#address-cells = <3>;

			#size-cells = <2>;

			device_type = "pci";

			reg = <0 0 0 0 0>;

			ranges = <0x02000000 0 0xa8000000

				  0x02000000 0 0xa8000000

				  0 0x10000000

				  0x01000000 0 0x00000000

				  0x01000000 0 0x00000000

				  0 0x00800000>;

		};

	};



	pci2: pcie@e000a000 {

		#address-cells = <3>;

		#size-cells = <2>;

		#interrupt-cells = <1>;

		device_type = "pci";

		compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";

		reg = <0xe000a000 0x00001000>;

		ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000

			  0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;

		bus-range = <0 255>;

		interrupt-map-mask = <0xf800 0 0 7>;

		interrupt-map = <0 0 0 1 &ipic 2 8

				 0 0 0 2 &ipic 2 8

				 0 0 0 3 &ipic 2 8

				 0 0 0 4 &ipic 2 8>;

		clock-frequency = <0>;



		pcie@0 {

			#address-cells = <3>;

			#size-cells = <2>;

			device_type = "pci";

			reg = <0 0 0 0 0>;

			ranges = <0x02000000 0 0xc8000000

				  0x02000000 0 0xc8000000

				  0 0x10000000

				  0x01000000 0 0x00000000

				  0x01000000 0 0x00000000

				  0 0x00800000>;

		};

	};

};

arch/powerpc/boot/dts/mpc8378_rdb.dts

+64 −0
Original line number Diff line number Diff line
@@ -22,6 +22,8 @@ 
		serial0 = &serial0;

		serial1 = &serial1;

		pci0 = &pci0;

		pci1 = &pci1;

		pci2 = &pci2;

	};



	cpus {
@@ -334,4 +336,66 @@ 
		compatible = "fsl,mpc8349-pci";

		device_type = "pci";

	};



	pci1: pcie@e0009000 {

		#address-cells = <3>;

		#size-cells = <2>;

		#interrupt-cells = <1>;

		device_type = "pci";

		compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";

		reg = <0xe0009000 0x00001000>;

		ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000

		          0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;

		bus-range = <0 255>;

		interrupt-map-mask = <0xf800 0 0 7>;

		interrupt-map = <0 0 0 1 &ipic 1 8

				 0 0 0 2 &ipic 1 8

				 0 0 0 3 &ipic 1 8

				 0 0 0 4 &ipic 1 8>;

		clock-frequency = <0>;



		pcie@0 {

			#address-cells = <3>;

			#size-cells = <2>;

			device_type = "pci";

			reg = <0 0 0 0 0>;

			ranges = <0x02000000 0 0xa8000000

				  0x02000000 0 0xa8000000

				  0 0x10000000

				  0x01000000 0 0x00000000

				  0x01000000 0 0x00000000

				  0 0x00800000>;

		};

	};



	pci2: pcie@e000a000 {

		#address-cells = <3>;

		#size-cells = <2>;

		#interrupt-cells = <1>;

		device_type = "pci";

		compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";

		reg = <0xe000a000 0x00001000>;

		ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000

			  0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;

		bus-range = <0 255>;

		interrupt-map-mask = <0xf800 0 0 7>;

		interrupt-map = <0 0 0 1 &ipic 2 8

				 0 0 0 2 &ipic 2 8

				 0 0 0 3 &ipic 2 8

				 0 0 0 4 &ipic 2 8>;

		clock-frequency = <0>;



		pcie@0 {

			#address-cells = <3>;

			#size-cells = <2>;

			device_type = "pci";

			reg = <0 0 0 0 0>;

			ranges = <0x02000000 0 0xc8000000

				  0x02000000 0 0xc8000000

				  0 0x10000000

				  0x01000000 0 0x00000000

				  0x01000000 0 0x00000000

				  0 0x00800000>;

		};

	};

};