Merge "phy: qcom-ufs: Update documentation for ref_clk"

- vdda-pll-supply   : phandle to PHY PLL and Power-Gen block power supply

- clocks	    : List of phandle and clock specifier pairs

- clock-names       : List of clock input name strings sorted in the same

		      order as the clocks property. "ref_clk_src", "ref_clk",

		      order as the clocks property. "ref_clk_src",

		      "tx_iface_clk" & "rx_iface_clk" are mandatory but

		      "ref_clk_parent" is optional

		      "ref_clk_parent" and "ref_clk" are optional

Optional properties:

- vdda-phy-max-microamp : specifies max. load that can be drawn from phy supply