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Commit 0307e177 authored by Christoffer Dall's avatar Christoffer Dall
Browse files

irqchip: arm-gic: Define additional MMIO offsets and masks 



Define CPU interface offsets for the GICC_ABPR, GICC_APR, and GICC_IIDR
registers.  Define distributor registers for the GICD_SPENDSGIR and the
GICD_CPENDSGIR.  KVM/ARM needs to know about these definitions to fully
support save/restore of the VGIC.

Also define some masks and shifts for the various GICH_VMCR fields.

Cc: Thomas Gleixner <tglx@linutronix.de>
Acked-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarChristoffer Dall <christoffer.dall@linaro.org>
parent ce01e4e8

include/linux/irqchip/arm-gic.h

+12 −0
Original line number Diff line number Diff line
@@ -17,6 +17,9 @@ 
#define GIC_CPU_EOI			0x10

#define GIC_CPU_RUNNINGPRI		0x14

#define GIC_CPU_HIGHPRI			0x18

#define GIC_CPU_ALIAS_BINPOINT		0x1c

#define GIC_CPU_ACTIVEPRIO		0xd0

#define GIC_CPU_IDENT			0xfc



#define GIC_DIST_CTRL			0x000

#define GIC_DIST_CTR			0x004
@@ -56,6 +59,15 @@ 
#define GICH_LR_ACTIVE_BIT		(1 << 29)

#define GICH_LR_EOI			(1 << 19)



#define GICH_VMCR_CTRL_SHIFT		0

#define GICH_VMCR_CTRL_MASK		(0x21f << GICH_VMCR_CTRL_SHIFT)

#define GICH_VMCR_PRIMASK_SHIFT		27

#define GICH_VMCR_PRIMASK_MASK		(0x1f << GICH_VMCR_PRIMASK_SHIFT)

#define GICH_VMCR_BINPOINT_SHIFT	21

#define GICH_VMCR_BINPOINT_MASK		(0x7 << GICH_VMCR_BINPOINT_SHIFT)

#define GICH_VMCR_ALIAS_BINPOINT_SHIFT	18

#define GICH_VMCR_ALIAS_BINPOINT_MASK	(0x7 << GICH_VMCR_ALIAS_BINPOINT_SHIFT)



#define GICH_MISR_EOI			(1 << 0)

#define GICH_MISR_U			(1 << 1)