Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 02e1552f authored by David Collins's avatar David Collins Committed by Gerrit - the friendly Code Review server
Browse files

ARM: dts: msm: add PM855 PMIC devices for sm8150-auto 



Add PMIC devices for the primary PM855 and secondary PM855 chips
found on sm8150-auto boards.

Change-Id: I8c6ac5601e3b2205070822d32b062741502b1f5c
Signed-off-by: default avatarDavid Collins <collinsd@codeaurora.org>
parent 931f0da6

arch/arm64/boot/dts/qcom/pm855.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
 * GNU General Public License for more details.

 */



#include <dt-bindings/clock/qcom,rpmh.h>

#include <dt-bindings/input/input.h>

#include <dt-bindings/input/qcom,qpnp-power-on.h>

#include <dt-bindings/interrupt-controller/irq.h>

arch/arm64/boot/dts/qcom/sm8150-auto-adp-star.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -10,6 +10,8 @@ 
 * GNU General Public License for more details.

 */



#include "sm8150-auto-pmic-overlay.dtsi"



&soc {

	qcom,lpass@17300000 {

		status = "disabled";

arch/arm64/boot/dts/qcom/sm8150-auto-pmic-overlay.dtsi

0 → 100644
+89 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#include "pm855.dtsi"



pm855_1_tz: &pm855_tz {

};



pm855_1_clkdiv: &pm855_clkdiv {

	clock-output-names = "pm855_1_div_clk1", "pm855_1_div_clk2";

};



pm855_1_rtc: &pm855_rtc {

};



pm855_1_gpios: &pm855_gpios {

	interrupts = <0x0 0xc0 0 IRQ_TYPE_NONE>,

			<0x0 0xc2 0 IRQ_TYPE_NONE>,

			<0x0 0xc3 0 IRQ_TYPE_NONE>,

			<0x0 0xc5 0 IRQ_TYPE_NONE>,

			<0x0 0xc8 0 IRQ_TYPE_NONE>,

			<0x0 0xc9 0 IRQ_TYPE_NONE>;

	interrupt-names = "pm855_1_gpio1", "pm855_1_gpio3",

			"pm855_1_gpio4", "pm855_1_gpio6",

			"pm855_1_gpio9", "pm855_1_gpio10";

	qcom,gpios-disallowed = <2 5 7 8>;

};



/* PM855_2: */

&spmi_bus {

	qcom,pm855@4 {

		compatible = "qcom,spmi-pmic";

		reg = <0x4 SPMI_USID>;

		#address-cells = <1>;

		#size-cells = <1>;



		qcom,power-on@800 {

			compatible = "qcom,qpnp-power-on";

			reg = <0x800 0x100>;

		};



		pm855_2_clkdiv: clock-controller@5b00 {

			compatible = "qcom,spmi-clkdiv";

			reg = <0x5b00 0x200>;

			#clock-cells = <1>;

			qcom,num-clkdivs = <2>;

			clock-output-names = "pm855_2_div_clk1",

						"pm855_2_div_clk2";

			clocks = <&clock_rpmh RPMH_CXO_CLK>;

			clock-names = "xo";

		};



		pm855_2_gpios: pinctrl@c000 {

			compatible = "qcom,spmi-gpio";

			reg = <0xc000 0xa00>;

			interrupts = <0x4 0xc0 0 IRQ_TYPE_NONE>,

					<0x4 0xc2 0 IRQ_TYPE_NONE>,

					<0x4 0xc3 0 IRQ_TYPE_NONE>,

					<0x4 0xc5 0 IRQ_TYPE_NONE>,

					<0x4 0xc7 0 IRQ_TYPE_NONE>,

					<0x4 0xc8 0 IRQ_TYPE_NONE>,

					<0x4 0xc9 0 IRQ_TYPE_NONE>;

			interrupt-names = "pm855_2_gpio1", "pm855_2_gpio3",

					"pm855_2_gpio4", "pm855_2_gpio6",

					"pm855_2_gpio8", "pm855_2_gpio9",

					"pm855_2_gpio10";

			gpio-controller;

			#gpio-cells = <2>;

			qcom,gpios-disallowed = <2 5 7>;

		};

	};



	qcom,pm855@5 {

		compatible ="qcom,spmi-pmic";

		reg = <0x5 SPMI_USID>;

		#address-cells = <1>;

		#size-cells = <1>;

	};

};