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Commit 013ef6cf authored by Imre Deak's avatar Imre Deak Committed by Jani Nikula
Browse files

drm/i915/ibx: Ensure the HW is powered during PLL HW readout 



The assumption when adding the intel_display_power_is_enabled() checks
was that if it returns success the power can't be turned off afterwards
during the HW access, which is guaranteed by modeset locks. This isn't
always true, so make sure we hold a dedicated reference for the time of
the access.

Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1455296121-4742-4-git-send-email-imre.deak@intel.com


(cherry picked from commit 12fda387)
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 9fb84d5a

drivers/gpu/drm/i915/intel_display.c

+3 −1
Original line number Original line Diff line number Diff line
@@ -13659,7 +13659,7 @@ static bool ibx_pch_dpll_get_hw_state(struct drm_i915_private *dev_priv, 
{

{

	uint32_t val;

	uint32_t val;





	if (!intel_display_power_is_enabled(dev_priv, POWER_DOMAIN_PLLS))

	if (!intel_display_power_get_if_enabled(dev_priv, POWER_DOMAIN_PLLS))

		return false;

		return false;





	val = I915_READ(PCH_DPLL(pll->id));

	val = I915_READ(PCH_DPLL(pll->id));
@@ -13667,6 +13667,8 @@ static bool ibx_pch_dpll_get_hw_state(struct drm_i915_private *dev_priv, 
	hw_state->fp0 = I915_READ(PCH_FP0(pll->id));

	hw_state->fp0 = I915_READ(PCH_FP0(pll->id));

	hw_state->fp1 = I915_READ(PCH_FP1(pll->id));

	hw_state->fp1 = I915_READ(PCH_FP1(pll->id));





	intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS);



	return val & DPLL_VCO_ENABLE;

	return val & DPLL_VCO_ENABLE;

}

}