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Commit fff84d2a authored by David S. Miller's avatar David S. Miller
Browse files

Merge tag 'shared-for-4.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/leon/linux-rdma 



Saeed Mahameed says:

====================
Mellanox mlx5 core driver updates 2016-08-24

This series contains some low level and API updates for mlx5 core
driver interface and mlx5_ifc.h, plus mlx5 LAG core driver support,
to be shared as base code for net-next and rdma mlx5 4.9 submissions.

From Alex and Artemy, Update mlx5_ifc for modify RQ and XRC bits.

From Noa, Expose mlx5 link modes so they can be used in RDMA tree for rdma tools.

From Aviv, LAG support needed for RDMA.
    - Add needed hardware structures, layouts and interface
    - mlx5 core driver LAG implementation
    - Introduce mlx5 core driver LAG API for mlx5_ib

From Maor, add two low level patches for mlx5 hardware sniffer QP
infrastructure bits and capabilities, plus added the namespace for sniffer
steering tables.  Needed for RDMA subtree.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents e53ee454 87d22483

drivers/infiniband/hw/mlx5/main.c

+1 −2
Original line number Diff line number Diff line
@@ -748,8 +748,7 @@ static int mlx5_query_hca_port(struct ib_device *ibdev, u8 port, 
				     &props->active_width);

	if (err)

		goto out;

	err = mlx5_query_port_proto_oper(mdev, &props->active_speed, MLX5_PTYS_IB,

					 port);

	err = mlx5_query_port_ib_proto_oper(mdev, &props->active_speed, port);

	if (err)

		goto out;

drivers/net/ethernet/mellanox/mlx5/core/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -3,7 +3,7 @@ obj-$(CONFIG_MLX5_CORE) += mlx5_core.o 
mlx5_core-y :=	main.o cmd.o debugfs.o fw.o eq.o uar.o pagealloc.o \

		health.o mcg.o cq.o srq.o alloc.o qp.o port.o mr.o pd.o \

		mad.o transobj.o vport.o sriov.o fs_cmd.o fs_core.o \

		fs_counters.o rl.o

		fs_counters.o rl.o lag.o



mlx5_core-$(CONFIG_MLX5_CORE_EN) += wq.o eswitch.o eswitch_offloads.o \

		en_main.o en_common.o en_fs.o en_ethtool.o en_tx.o \

drivers/net/ethernet/mellanox/mlx5/core/cmd.c

+12 −0
Original line number Diff line number Diff line
@@ -285,6 +285,8 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op, 
	case MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN:

	case MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT:

	case MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY:

	case MLX5_CMD_OP_DESTROY_LAG:

	case MLX5_CMD_OP_DESTROY_VPORT_LAG:

	case MLX5_CMD_OP_DESTROY_TIR:

	case MLX5_CMD_OP_DESTROY_SQ:

	case MLX5_CMD_OP_DESTROY_RQ:
@@ -376,6 +378,10 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op, 
	case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:

	case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:

	case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY:

	case MLX5_CMD_OP_CREATE_LAG:

	case MLX5_CMD_OP_MODIFY_LAG:

	case MLX5_CMD_OP_QUERY_LAG:

	case MLX5_CMD_OP_CREATE_VPORT_LAG:

	case MLX5_CMD_OP_CREATE_TIR:

	case MLX5_CMD_OP_MODIFY_TIR:

	case MLX5_CMD_OP_QUERY_TIR:
@@ -514,6 +520,12 @@ const char *mlx5_command_str(int command) 
	MLX5_COMMAND_STR_CASE(DELETE_L2_TABLE_ENTRY);

	MLX5_COMMAND_STR_CASE(SET_WOL_ROL);

	MLX5_COMMAND_STR_CASE(QUERY_WOL_ROL);

	MLX5_COMMAND_STR_CASE(CREATE_LAG);

	MLX5_COMMAND_STR_CASE(MODIFY_LAG);

	MLX5_COMMAND_STR_CASE(QUERY_LAG);

	MLX5_COMMAND_STR_CASE(DESTROY_LAG);

	MLX5_COMMAND_STR_CASE(CREATE_VPORT_LAG);

	MLX5_COMMAND_STR_CASE(DESTROY_VPORT_LAG);

	MLX5_COMMAND_STR_CASE(CREATE_TIR);

	MLX5_COMMAND_STR_CASE(MODIFY_TIR);

	MLX5_COMMAND_STR_CASE(DESTROY_TIR);

drivers/net/ethernet/mellanox/mlx5/core/en.h

+0 −34
Original line number Diff line number Diff line
@@ -651,40 +651,6 @@ struct mlx5e_priv { 
	void                      *ppriv;

};



enum mlx5e_link_mode {

	MLX5E_1000BASE_CX_SGMII	 = 0,

	MLX5E_1000BASE_KX	 = 1,

	MLX5E_10GBASE_CX4	 = 2,

	MLX5E_10GBASE_KX4	 = 3,

	MLX5E_10GBASE_KR	 = 4,

	MLX5E_20GBASE_KR2	 = 5,

	MLX5E_40GBASE_CR4	 = 6,

	MLX5E_40GBASE_KR4	 = 7,

	MLX5E_56GBASE_R4	 = 8,

	MLX5E_10GBASE_CR	 = 12,

	MLX5E_10GBASE_SR	 = 13,

	MLX5E_10GBASE_ER	 = 14,

	MLX5E_40GBASE_SR4	 = 15,

	MLX5E_40GBASE_LR4	 = 16,

	MLX5E_50GBASE_SR2	 = 18,

	MLX5E_100GBASE_CR4	 = 20,

	MLX5E_100GBASE_SR4	 = 21,

	MLX5E_100GBASE_KR4	 = 22,

	MLX5E_100GBASE_LR4	 = 23,

	MLX5E_100BASE_TX	 = 24,

	MLX5E_1000BASE_T	 = 25,

	MLX5E_10GBASE_T		 = 26,

	MLX5E_25GBASE_CR	 = 27,

	MLX5E_25GBASE_KR	 = 28,

	MLX5E_25GBASE_SR	 = 29,

	MLX5E_50GBASE_CR2	 = 30,

	MLX5E_50GBASE_KR2	 = 31,

	MLX5E_LINK_MODES_NUMBER,

};



#define MLX5E_PROT_MASK(link_mode) (1 << link_mode)





void mlx5e_build_ptys2ethtool_map(void);



void mlx5e_send_nop(struct mlx5e_sq *sq, bool notify_hw);

drivers/net/ethernet/mellanox/mlx5/core/en_main.c

+9 −1
Original line number Diff line number Diff line
@@ -489,7 +489,8 @@ static int mlx5e_modify_rq_vsd(struct mlx5e_rq *rq, bool vsd) 
	rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx);



	MLX5_SET(modify_rq_in, in, rq_state, MLX5_RQC_STATE_RDY);

	MLX5_SET64(modify_rq_in, in, modify_bitmask, MLX5_RQ_BITMASK_VSD);

	MLX5_SET64(modify_rq_in, in, modify_bitmask,

		   MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD);

	MLX5_SET(rqc, rqc, vsd, vsd);

	MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RDY);
@@ -2024,6 +2025,10 @@ static int mlx5e_create_tis(struct mlx5e_priv *priv, int tc) 


	MLX5_SET(tisc, tisc, prio, tc << 1);

	MLX5_SET(tisc, tisc, transport_domain, mdev->mlx5e_res.td.tdn);



	if (mlx5_lag_is_lacp_owner(mdev))

		MLX5_SET(tisc, tisc, strict_lag_tx_port_affinity, 1);



	return mlx5_core_create_tis(mdev, in, sizeof(in), &priv->tisn[tc]);

}
@@ -3368,6 +3373,8 @@ static void mlx5e_nic_enable(struct mlx5e_priv *priv) 
	struct mlx5_eswitch *esw = mdev->priv.eswitch;

	struct mlx5_eswitch_rep rep;



	mlx5_lag_add(mdev, netdev);



	if (mlx5e_vxlan_allowed(mdev)) {

		rtnl_lock();

		udp_tunnel_get_rx_info(netdev);
@@ -3390,6 +3397,7 @@ static void mlx5e_nic_disable(struct mlx5e_priv *priv) 
{

	queue_work(priv->wq, &priv->set_rx_mode_work);

	mlx5e_disable_async_events(priv);

	mlx5_lag_remove(priv->mdev);

}



static const struct mlx5e_profile mlx5e_nic_profile = {