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Commit ffcd060f authored by Ulrich Hecht's avatar Ulrich Hecht Committed by Simon Horman
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arm64: dts: renesas: r8a77995: add I2C support 



Defines R-Car D3 I2C controllers 0-3.

Signed-off-by: default avatarUlrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent a052d934

arch/arm64/boot/dts/renesas/r8a77995.dtsi

+67 −0
Original line number Diff line number Diff line
@@ -536,6 +536,73 @@ 
			status = "disabled";

		};



		i2c0: i2c@e6500000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "renesas,i2c-r8a77995",

				     "renesas,rcar-gen3-i2c";

			reg = <0 0xe6500000 0 0x40>;

			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 931>;

			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;

			resets = <&cpg 931>;

			dmas = <&dmac1 0x91>, <&dmac1 0x90>,

			       <&dmac2 0x91>, <&dmac2 0x90>;

			dma-names = "tx", "rx", "tx", "rx";

			i2c-scl-internal-delay-ns = <6>;

			status = "disabled";

		};



		i2c1: i2c@e6508000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "renesas,i2c-r8a77995",

				     "renesas,rcar-gen3-i2c";

			reg = <0 0xe6508000 0 0x40>;

			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 930>;

			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;

			resets = <&cpg 930>;

			dmas = <&dmac1 0x93>, <&dmac1 0x92>,

			       <&dmac2 0x93>, <&dmac2 0x92>;

			dma-names = "tx", "rx", "tx", "rx";

			i2c-scl-internal-delay-ns = <6>;

			status = "disabled";

		};



		i2c2: i2c@e6510000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "renesas,i2c-r8a77995",

				     "renesas,rcar-gen3-i2c";

			reg = <0 0xe6510000 0 0x40>;

			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 929>;

			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;

			resets = <&cpg 929>;

			dmas = <&dmac1 0x95>, <&dmac1 0x94>,

			       <&dmac2 0x95>, <&dmac2 0x94>;

			dma-names = "tx", "rx", "tx", "rx";

			i2c-scl-internal-delay-ns = <6>;

			status = "disabled";

		};



		i2c3: i2c@e66d0000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "renesas,i2c-r8a77995",

				     "renesas,rcar-gen3-i2c";

			reg = <0 0xe66d0000 0 0x40>;

			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 928>;

			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;

			resets = <&cpg 928>;

			dmas = <&dmac0 0x97>, <&dmac0 0x96>;

			dma-names = "tx", "rx";

			i2c-scl-internal-delay-ns = <6>;

			status = "disabled";

		};



		pwm0: pwm@e6e30000 {

			compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";

			reg = <0 0xe6e30000 0 0x8>;