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Commit ff783233 authored by Srinivas Kandagatla's avatar Srinivas Kandagatla Committed by Ulf Hansson
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mmc: mmci: Add Qcom datactrl register variant 



Instance of this IP on Qualcomm's SOCs has bit different layout for datactrl
register. Bit position datactrl[16:4] hold the true block size instead of power
of 2.

Signed-off-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 6adb2a80

drivers/mmc/host/mmci.c

+5 −0
Original line number Diff line number Diff line
@@ -60,6 +60,8 @@ static unsigned int fmax = 515633; 
 * @sdio: variant supports SDIO

 * @st_clkdiv: true if using a ST-specific clock divider algorithm

 * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl register

 * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl

 *		     register

 * @pwrreg_powerup: power up value for MMCIPOWER register

 * @signal_direction: input/out direction of bus signals can be indicated

 * @pwrreg_clkgate: MMCIPOWER register must be used to gate the clock
@@ -75,6 +77,7 @@ struct variant_data { 
	bool			sdio;

	bool			st_clkdiv;

	bool			blksz_datactrl16;

	bool			blksz_datactrl4;

	u32			pwrreg_powerup;

	bool			signal_direction;

	bool			pwrreg_clkgate;
@@ -732,6 +735,8 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) 


	if (variant->blksz_datactrl16)

		datactrl = MCI_DPSM_ENABLE | (data->blksz << 16);

	else if (variant->blksz_datactrl4)

		datactrl = MCI_DPSM_ENABLE | (data->blksz << 4);

	else

		datactrl = MCI_DPSM_ENABLE | blksz_bits << 4;