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Commit ff65fa6c authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'mlxsw-traps' 



Jiri Pirko says:

====================
mlxsw: Traps enhancements

Ido says:

The first patch makes sure the driver marks packets that were trapped
in the router and might have already been flooded by the bridge, so that
the bridge driver won't flood them again. This isn't critical at this time
point, but will be when Neighbour Discovery traps are introduced as these
are multicast packets that are trapped in the router.

The second and third patches add new traps - for MLD and Router Alert
packets. The last patch takes advantage of that and floods IPv6
unregistered multicast packets only to mrouter ports instead of all ports.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents ef210ec0 9df552ef

drivers/net/ethernet/mellanox/mlxsw/reg.h

+1 −0
Original line number Diff line number Diff line
@@ -3688,6 +3688,7 @@ enum mlxsw_reg_htgt_trap_group { 
	MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME,

	MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP,

	MLXSW_REG_HTGT_TRAP_GROUP_SP_EVENT,

	MLXSW_REG_HTGT_TRAP_GROUP_SP_IPV6_MLD,

};



/* reg_htgt_trap_group

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

+18 −7
Original line number Diff line number Diff line
@@ -3333,15 +3333,24 @@ static const struct mlxsw_listener mlxsw_sp_listener[] = { 
	MLXSW_SP_RXL_MARK(ARPBC, MIRROR_TO_CPU, ARP, false),

	MLXSW_SP_RXL_MARK(ARPUC, MIRROR_TO_CPU, ARP, false),

	MLXSW_SP_RXL_NO_MARK(FID_MISS, TRAP_TO_CPU, IP2ME, false),

	MLXSW_SP_RXL_MARK(IPV6_MLDV12_LISTENER_QUERY, MIRROR_TO_CPU, IPV6_MLD,

			  false),

	MLXSW_SP_RXL_NO_MARK(IPV6_MLDV1_LISTENER_REPORT, TRAP_TO_CPU, IPV6_MLD,

			     false),

	MLXSW_SP_RXL_NO_MARK(IPV6_MLDV1_LISTENER_DONE, TRAP_TO_CPU, IPV6_MLD,

			     false),

	MLXSW_SP_RXL_NO_MARK(IPV6_MLDV2_LISTENER_REPORT, TRAP_TO_CPU, IPV6_MLD,

			     false),

	/* L3 traps */

	MLXSW_SP_RXL_NO_MARK(MTUERROR, TRAP_TO_CPU, ROUTER_EXP, false),

	MLXSW_SP_RXL_NO_MARK(TTLERROR, TRAP_TO_CPU, ROUTER_EXP, false),

	MLXSW_SP_RXL_NO_MARK(LBERROR, TRAP_TO_CPU, ROUTER_EXP, false),

	MLXSW_SP_RXL_MARK(MTUERROR, TRAP_TO_CPU, ROUTER_EXP, false),

	MLXSW_SP_RXL_MARK(TTLERROR, TRAP_TO_CPU, ROUTER_EXP, false),

	MLXSW_SP_RXL_MARK(LBERROR, TRAP_TO_CPU, ROUTER_EXP, false),

	MLXSW_SP_RXL_MARK(OSPF, TRAP_TO_CPU, OSPF, false),

	MLXSW_SP_RXL_NO_MARK(IP2ME, TRAP_TO_CPU, IP2ME, false),

	MLXSW_SP_RXL_NO_MARK(RTR_INGRESS0, TRAP_TO_CPU, REMOTE_ROUTE, false),

	MLXSW_SP_RXL_NO_MARK(HOST_MISS_IPV4, TRAP_TO_CPU, ARP_MISS, false),

	MLXSW_SP_RXL_NO_MARK(BGP_IPV4, TRAP_TO_CPU, BGP_IPV4, false),

	MLXSW_SP_RXL_MARK(IP2ME, TRAP_TO_CPU, IP2ME, false),

	MLXSW_SP_RXL_MARK(RTR_INGRESS0, TRAP_TO_CPU, REMOTE_ROUTE, false),

	MLXSW_SP_RXL_MARK(HOST_MISS_IPV4, TRAP_TO_CPU, ARP_MISS, false),

	MLXSW_SP_RXL_MARK(BGP_IPV4, TRAP_TO_CPU, BGP_IPV4, false),

	MLXSW_SP_RXL_MARK(ROUTER_ALERT_IPV4, TRAP_TO_CPU, ROUTER_EXP, false),

	/* PKT Sample trap */

	MLXSW_RXL(mlxsw_sp_rx_listener_sample_func, PKT_SAMPLE, MIRROR_TO_CPU,

		  false, SP_IP2ME, DISCARD),
@@ -3376,6 +3385,7 @@ static int mlxsw_sp_cpu_policers_set(struct mlxsw_core *mlxsw_core) 
			burst_size = 7;

			break;

		case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:

		case MLXSW_REG_HTGT_TRAP_GROUP_SP_IPV6_MLD:

			rate = 16 * 1024;

			burst_size = 10;

			break;
@@ -3440,6 +3450,7 @@ static int mlxsw_sp_trap_groups_set(struct mlxsw_core *mlxsw_core) 
			break;

		case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:

		case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:

		case MLXSW_REG_HTGT_TRAP_GROUP_SP_IPV6_MLD:

			priority = 3;

			tc = 3;

			break;

drivers/net/ethernet/mellanox/mlxsw/spectrum_fid.c

+1 −1
Original line number Diff line number Diff line
@@ -109,7 +109,6 @@ static const int mlxsw_sp_sfgc_uc_packet_types[MLXSW_REG_SFGC_TYPE_MAX] = { 


static const int mlxsw_sp_sfgc_bc_packet_types[MLXSW_REG_SFGC_TYPE_MAX] = {

	[MLXSW_REG_SFGC_TYPE_BROADCAST]				= 1,

	[MLXSW_REG_SFGC_TYPE_UNREGISTERED_MULTICAST_IPV6]	= 1,

	[MLXSW_REG_SFGC_TYPE_UNREGISTERED_MULTICAST_NON_IP]	= 1,

	[MLXSW_REG_SFGC_TYPE_IPV4_LINK_LOCAL]			= 1,

	[MLXSW_REG_SFGC_TYPE_IPV6_ALL_HOST]			= 1,
@@ -117,6 +116,7 @@ static const int mlxsw_sp_sfgc_bc_packet_types[MLXSW_REG_SFGC_TYPE_MAX] = { 


static const int mlxsw_sp_sfgc_mc_packet_types[MLXSW_REG_SFGC_TYPE_MAX] = {

	[MLXSW_REG_SFGC_TYPE_UNREGISTERED_MULTICAST_IPV4]	= 1,

	[MLXSW_REG_SFGC_TYPE_UNREGISTERED_MULTICAST_IPV6]	= 1,

};



static const int *mlxsw_sp_packet_type_sfgc_types[] = {

drivers/net/ethernet/mellanox/mlxsw/trap.h

+5 −0
Original line number Diff line number Diff line
@@ -63,9 +63,14 @@ enum { 
	MLXSW_TRAP_ID_LBERROR = 0x54,

	MLXSW_TRAP_ID_OSPF = 0x55,

	MLXSW_TRAP_ID_IP2ME = 0x5F,

	MLXSW_TRAP_ID_IPV6_MLDV12_LISTENER_QUERY = 0x65,

	MLXSW_TRAP_ID_IPV6_MLDV1_LISTENER_REPORT = 0x66,

	MLXSW_TRAP_ID_IPV6_MLDV1_LISTENER_DONE = 0x67,

	MLXSW_TRAP_ID_IPV6_MLDV2_LISTENER_REPORT = 0x68,

	MLXSW_TRAP_ID_RTR_INGRESS0 = 0x70,

	MLXSW_TRAP_ID_BGP_IPV4 = 0x88,

	MLXSW_TRAP_ID_HOST_MISS_IPV4 = 0x90,

	MLXSW_TRAP_ID_ROUTER_ALERT_IPV4 = 0xD6,

	MLXSW_TRAP_ID_ACL0 = 0x1C0,



	MLXSW_TRAP_ID_MAX = 0x1FF