Loading drivers/gpu/drm/drm_edid.c +28 −0 Original line number Diff line number Diff line Loading @@ -2844,6 +2844,9 @@ add_detailed_modes(struct drm_connector *connector, struct edid *edid, #define VIDEO_BLOCK 0x02 #define VENDOR_BLOCK 0x03 #define SPEAKER_BLOCK 0x04 #define VENDOR_SPECIFIC_VIDEO_DATA_BLOCK 0x01 #define VSVDB_HDR10_PLUS_IEEE_CODE 0x90848b #define VSVDB_HDR10_PLUS_APP_VER_MASK 0x3 #define HDR_STATIC_METADATA_EXTENDED_DATA_BLOCK 0x06 #define USE_EXTENDED_TAG 0x07 #define EXT_VIDEO_CAPABILITY_BLOCK 0x00 Loading Loading @@ -3875,6 +3878,28 @@ drm_extract_vcdb_info(struct drm_connector *connector, const u8 *db) (int) connector->ce_scan_info); } static void drm_parse_vsvdb_hdr_plus(struct drm_connector *connector, const u8 *db) { connector->hdr_plus_app_ver = db[5] & VSVDB_HDR10_PLUS_APP_VER_MASK; } static void drm_extract_vsvdb_info(struct drm_connector *connector, const u8 *db) { u8 db_len = cea_db_payload_len(db); u32 ieee_code = 0; if (db_len < 5) return; /* Bytes 2-4: IEEE 24-bit code, LSB first */ ieee_code = db[2] | (db[3] << 8) | (db[4] << 16); DRM_DEBUG_KMS("found VSVDB with IEEE code 0x%x\n", ieee_code); if (ieee_code == VSVDB_HDR10_PLUS_IEEE_CODE) drm_parse_vsvdb_hdr_plus(connector, db); } static bool drm_edid_is_luminance_value_present( u32 block_length, enum luminance_value value) { Loading Loading @@ -3956,6 +3981,9 @@ drm_hdmi_extract_extended_blk_info(struct drm_connector *connector, case VIDEO_CAPABILITY_EXTENDED_DATA_BLOCK: drm_extract_vcdb_info(connector, db); break; case VENDOR_SPECIFIC_VIDEO_DATA_BLOCK: drm_extract_vsvdb_info(connector, db); break; case HDR_STATIC_METADATA_EXTENDED_DATA_BLOCK: drm_extract_hdr_db(connector, db); break; Loading include/drm/drm_connector.h +1 −0 Original line number Diff line number Diff line Loading @@ -1035,6 +1035,7 @@ struct drm_connector { u32 hdr_avg_luminance; u32 hdr_min_luminance; bool hdr_supported; u8 hdr_plus_app_ver; /* EDID bits HDMI 2.0 * @max_tmds_char: indicates the maximum TMDS Character Rate supported Loading include/uapi/drm/msm_drm.h +7 −0 Original line number Diff line number Diff line Loading @@ -83,6 +83,7 @@ struct drm_msm_timespec { #define HDR_EOTF_HLG 0x3 #define DRM_MSM_EXT_HDR_METADATA #define DRM_MSM_EXT_HDR_PLUS_METADATA struct drm_msm_ext_hdr_metadata { __u32 hdr_state; /* HDR state */ __u32 eotf; /* electro optical transfer function */ Loading @@ -95,6 +96,9 @@ struct drm_msm_ext_hdr_metadata { __u32 min_luminance; /* Min Luminance */ __u32 max_content_light_level; /* max content light level */ __u32 max_average_light_level; /* max average light level */ __u64 hdr_plus_payload; /* user pointer to dynamic HDR payload */ __u32 hdr_plus_payload_size;/* size of dynamic HDR payload data */ }; /** Loading @@ -103,6 +107,7 @@ struct drm_msm_ext_hdr_metadata { * to determine the HDR properties to be set to the sink. */ #define DRM_MSM_EXT_HDR_PROPERTIES #define DRM_MSM_EXT_HDR_PLUS_PROPERTIES struct drm_msm_ext_hdr_properties { __u8 hdr_metadata_type_one; /* static metadata type one */ __u32 hdr_supported; /* HDR supported */ Loading @@ -110,6 +115,8 @@ struct drm_msm_ext_hdr_properties { __u32 hdr_max_luminance; /* Max luminance */ __u32 hdr_avg_luminance; /* Avg luminance */ __u32 hdr_min_luminance; /* Min Luminance */ __u32 hdr_plus_supported; /* HDR10+ supported */ }; #define MSM_PARAM_GPU_ID 0x01 Loading Loading
drivers/gpu/drm/drm_edid.c +28 −0 Original line number Diff line number Diff line Loading @@ -2844,6 +2844,9 @@ add_detailed_modes(struct drm_connector *connector, struct edid *edid, #define VIDEO_BLOCK 0x02 #define VENDOR_BLOCK 0x03 #define SPEAKER_BLOCK 0x04 #define VENDOR_SPECIFIC_VIDEO_DATA_BLOCK 0x01 #define VSVDB_HDR10_PLUS_IEEE_CODE 0x90848b #define VSVDB_HDR10_PLUS_APP_VER_MASK 0x3 #define HDR_STATIC_METADATA_EXTENDED_DATA_BLOCK 0x06 #define USE_EXTENDED_TAG 0x07 #define EXT_VIDEO_CAPABILITY_BLOCK 0x00 Loading Loading @@ -3875,6 +3878,28 @@ drm_extract_vcdb_info(struct drm_connector *connector, const u8 *db) (int) connector->ce_scan_info); } static void drm_parse_vsvdb_hdr_plus(struct drm_connector *connector, const u8 *db) { connector->hdr_plus_app_ver = db[5] & VSVDB_HDR10_PLUS_APP_VER_MASK; } static void drm_extract_vsvdb_info(struct drm_connector *connector, const u8 *db) { u8 db_len = cea_db_payload_len(db); u32 ieee_code = 0; if (db_len < 5) return; /* Bytes 2-4: IEEE 24-bit code, LSB first */ ieee_code = db[2] | (db[3] << 8) | (db[4] << 16); DRM_DEBUG_KMS("found VSVDB with IEEE code 0x%x\n", ieee_code); if (ieee_code == VSVDB_HDR10_PLUS_IEEE_CODE) drm_parse_vsvdb_hdr_plus(connector, db); } static bool drm_edid_is_luminance_value_present( u32 block_length, enum luminance_value value) { Loading Loading @@ -3956,6 +3981,9 @@ drm_hdmi_extract_extended_blk_info(struct drm_connector *connector, case VIDEO_CAPABILITY_EXTENDED_DATA_BLOCK: drm_extract_vcdb_info(connector, db); break; case VENDOR_SPECIFIC_VIDEO_DATA_BLOCK: drm_extract_vsvdb_info(connector, db); break; case HDR_STATIC_METADATA_EXTENDED_DATA_BLOCK: drm_extract_hdr_db(connector, db); break; Loading
include/drm/drm_connector.h +1 −0 Original line number Diff line number Diff line Loading @@ -1035,6 +1035,7 @@ struct drm_connector { u32 hdr_avg_luminance; u32 hdr_min_luminance; bool hdr_supported; u8 hdr_plus_app_ver; /* EDID bits HDMI 2.0 * @max_tmds_char: indicates the maximum TMDS Character Rate supported Loading
include/uapi/drm/msm_drm.h +7 −0 Original line number Diff line number Diff line Loading @@ -83,6 +83,7 @@ struct drm_msm_timespec { #define HDR_EOTF_HLG 0x3 #define DRM_MSM_EXT_HDR_METADATA #define DRM_MSM_EXT_HDR_PLUS_METADATA struct drm_msm_ext_hdr_metadata { __u32 hdr_state; /* HDR state */ __u32 eotf; /* electro optical transfer function */ Loading @@ -95,6 +96,9 @@ struct drm_msm_ext_hdr_metadata { __u32 min_luminance; /* Min Luminance */ __u32 max_content_light_level; /* max content light level */ __u32 max_average_light_level; /* max average light level */ __u64 hdr_plus_payload; /* user pointer to dynamic HDR payload */ __u32 hdr_plus_payload_size;/* size of dynamic HDR payload data */ }; /** Loading @@ -103,6 +107,7 @@ struct drm_msm_ext_hdr_metadata { * to determine the HDR properties to be set to the sink. */ #define DRM_MSM_EXT_HDR_PROPERTIES #define DRM_MSM_EXT_HDR_PLUS_PROPERTIES struct drm_msm_ext_hdr_properties { __u8 hdr_metadata_type_one; /* static metadata type one */ __u32 hdr_supported; /* HDR supported */ Loading @@ -110,6 +115,8 @@ struct drm_msm_ext_hdr_properties { __u32 hdr_max_luminance; /* Max luminance */ __u32 hdr_avg_luminance; /* Avg luminance */ __u32 hdr_min_luminance; /* Min Luminance */ __u32 hdr_plus_supported; /* HDR10+ supported */ }; #define MSM_PARAM_GPU_ID 0x01 Loading