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Commit ff44ad51 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Move engine->submit_request selection to a vfunc 



It turns out that we may want to restore the original
engine->submit_request (and engine->schedule) callbacks from more than
just the guc <-> execlists transition. Move this to a vfunc so we can
have a common interface.

v2: Move initial selection to intel_engines_init_common(), repaint vfunc
with engine->set_default_submission (and a similar colour for the
helper).

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170316171305.12972-2-chris@chris-wilson.co.uk
parent 8c185eca

drivers/gpu/drm/i915/i915_guc_submission.c

+1 −1
Original line number Diff line number Diff line
@@ -1136,7 +1136,7 @@ void i915_guc_submission_disable(struct drm_i915_private *dev_priv) 
		return;



	/* Revert back to manual ELSP submission */

	intel_execlists_enable_submission(dev_priv);

	intel_engines_reset_default_submission(dev_priv);

}



void i915_guc_submission_fini(struct drm_i915_private *dev_priv)

drivers/gpu/drm/i915/intel_engine_cs.c

+12 −0
Original line number Diff line number Diff line
@@ -193,6 +193,7 @@ int intel_engines_init(struct drm_i915_private *dev_priv) 
			goto cleanup;

		}



		GEM_BUG_ON(!engine->submit_request);

		mask |= ENGINE_MASK(id);

	}
@@ -343,6 +344,8 @@ int intel_engine_init_common(struct intel_engine_cs *engine) 
{

	int ret;



	engine->set_default_submission(engine);



	/* We may need to do things with the shrinker which

	 * require us to immediately switch back to the default

	 * context. This can cause a problem as pinning the
@@ -1116,6 +1119,15 @@ bool intel_engines_are_idle(struct drm_i915_private *dev_priv) 
	return true;

}



void intel_engines_reset_default_submission(struct drm_i915_private *i915)

{

	struct intel_engine_cs *engine;

	enum intel_engine_id id;



	for_each_engine(engine, i915, id)

		engine->set_default_submission(engine);

}



#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)

#include "selftests/mock_engine.c"

#endif

drivers/gpu/drm/i915/intel_lrc.c

+5 −10
Original line number Diff line number Diff line
@@ -1558,16 +1558,11 @@ void intel_logical_ring_cleanup(struct intel_engine_cs *engine) 
	kfree(engine);

}



void intel_execlists_enable_submission(struct drm_i915_private *dev_priv)

static void execlists_set_default_submission(struct intel_engine_cs *engine)

{

	struct intel_engine_cs *engine;

	enum intel_engine_id id;



	for_each_engine(engine, dev_priv, id) {

	engine->submit_request = execlists_submit_request;

	engine->schedule = execlists_schedule;

}

}



static void

logical_ring_default_vfuncs(struct intel_engine_cs *engine)
@@ -1584,8 +1579,8 @@ logical_ring_default_vfuncs(struct intel_engine_cs *engine) 
	engine->emit_flush = gen8_emit_flush;

	engine->emit_breadcrumb = gen8_emit_breadcrumb;

	engine->emit_breadcrumb_sz = gen8_emit_breadcrumb_sz;

	engine->submit_request = execlists_submit_request;

	engine->schedule = execlists_schedule;



	engine->set_default_submission = execlists_set_default_submission;



	engine->irq_enable = gen8_logical_ring_enable_irq;

	engine->irq_disable = gen8_logical_ring_disable_irq;

drivers/gpu/drm/i915/intel_lrc.h

+0 −1
Original line number Diff line number Diff line
@@ -87,6 +87,5 @@ uint64_t intel_lr_context_descriptor(struct i915_gem_context *ctx, 
/* Execlists */

int intel_sanitize_enable_execlists(struct drm_i915_private *dev_priv,

				    int enable_execlists);

void intel_execlists_enable_submission(struct drm_i915_private *dev_priv);



#endif /* _INTEL_LRC_H_ */

drivers/gpu/drm/i915/intel_ringbuffer.c

+13 −2
Original line number Diff line number Diff line
@@ -2050,6 +2050,16 @@ static void intel_ring_init_irq(struct drm_i915_private *dev_priv, 
	}

}



static void i9xx_set_default_submission(struct intel_engine_cs *engine)

{

	engine->submit_request = i9xx_submit_request;

}



static void gen6_bsd_set_default_submission(struct intel_engine_cs *engine)

{

	engine->submit_request = gen6_bsd_submit_request;

}



static void intel_ring_default_vfuncs(struct drm_i915_private *dev_priv,

				      struct intel_engine_cs *engine)

{
@@ -2080,7 +2090,8 @@ static void intel_ring_default_vfuncs(struct drm_i915_private *dev_priv, 
				engine->emit_breadcrumb_sz++;

		}

	}

	engine->submit_request = i9xx_submit_request;



	engine->set_default_submission = i9xx_set_default_submission;



	if (INTEL_GEN(dev_priv) >= 8)

		engine->emit_bb_start = gen8_emit_bb_start;
@@ -2165,7 +2176,7 @@ int intel_init_bsd_ring_buffer(struct intel_engine_cs *engine) 
	if (INTEL_GEN(dev_priv) >= 6) {

		/* gen6 bsd needs a special wa for tail updates */

		if (IS_GEN6(dev_priv))

			engine->submit_request = gen6_bsd_submit_request;

			engine->set_default_submission = gen6_bsd_set_default_submission;

		engine->emit_flush = gen6_bsd_ring_flush;

		if (INTEL_GEN(dev_priv) < 8)

			engine->irq_enable_mask = GT_BSD_USER_INTERRUPT;