Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ff255c6c authored by David Brownell's avatar David Brownell Committed by Kevin Hilman
Browse files

davinci: dm365 evm cpld support: leds, card detect, other setup 



Add basic support for the CPLD on the DM365 EVM board:

 - Read SW5 to set up NAND and keypad vs (someday) OneNAND
 - Export MMC/SD card detect and writeprotect signals
 - LED support (same layout as on DM355 EVM)
 - Static config for video input:
     * external HD imager precludes MMC1, Ethernet, audio
     * else either tvp5146 (SD/default) or tvp7002 (HD)

The video input could actually be switched around dynamically;
change that if/when that's needed (and after those other video
inputs have driver support).

Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
parent 37b798da

arch/arm/mach-davinci/board-dm365-evm.c

+253 −10
Original line number Original line Diff line number Diff line
@@ -20,6 +20,7 @@ 
#include <linux/io.h>

#include <linux/io.h>

#include <linux/clk.h>

#include <linux/clk.h>

#include <linux/i2c/at24.h>

#include <linux/i2c/at24.h>

#include <linux/leds.h>

#include <linux/mtd/mtd.h>

#include <linux/mtd/mtd.h>

#include <linux/mtd/partitions.h>

#include <linux/mtd/partitions.h>

#include <linux/mtd/nand.h>

#include <linux/mtd/nand.h>
@@ -33,18 +34,71 @@ 
#include <mach/psc.h>

#include <mach/psc.h>

#include <mach/common.h>

#include <mach/common.h>

#include <mach/i2c.h>

#include <mach/i2c.h>

#include <linux/i2c.h>

#include <mach/serial.h>

#include <mach/serial.h>

#include <mach/common.h>

#include <mach/common.h>

#include <mach/mmc.h>

#include <mach/mmc.h>

#include <mach/nand.h>

#include <mach/nand.h>







static inline int have_imager(void)

{

	/* REVISIT when it's supported, trigger via Kconfig */

	return 0;

}



static inline int have_tvp7002(void)

{

	/* REVISIT when it's supported, trigger via Kconfig */

	return 0;

}





#define DM365_ASYNC_EMIF_CONTROL_BASE	0x01d10000

#define DM365_ASYNC_EMIF_CONTROL_BASE	0x01d10000

#define DM365_ASYNC_EMIF_DATA_CE0_BASE	0x02000000

#define DM365_ASYNC_EMIF_DATA_CE0_BASE	0x02000000

#define DM365_ASYNC_EMIF_DATA_CE1_BASE	0x04000000





#define DM365_EVM_PHY_MASK		(0x2)

#define DM365_EVM_PHY_MASK		(0x2)

#define DM365_EVM_MDIO_FREQUENCY	(2200000) /* PHY bus frequency */

#define DM365_EVM_MDIO_FREQUENCY	(2200000) /* PHY bus frequency */





/*

 * A MAX-II CPLD is used for various board control functions.

 */

#define CPLD_OFFSET(a13a8,a2a1)		(((a13a8) << 10) + ((a2a1) << 3))



#define CPLD_VERSION	CPLD_OFFSET(0,0)	/* r/o */

#define CPLD_TEST	CPLD_OFFSET(0,1)

#define CPLD_LEDS	CPLD_OFFSET(0,2)

#define CPLD_MUX	CPLD_OFFSET(0,3)

#define CPLD_SWITCH	CPLD_OFFSET(1,0)	/* r/o */

#define CPLD_POWER	CPLD_OFFSET(1,1)

#define CPLD_VIDEO	CPLD_OFFSET(1,2)

#define CPLD_CARDSTAT	CPLD_OFFSET(1,3)	/* r/o */



#define CPLD_DILC_OUT	CPLD_OFFSET(2,0)

#define CPLD_DILC_IN	CPLD_OFFSET(2,1)	/* r/o */



#define CPLD_IMG_DIR0	CPLD_OFFSET(2,2)

#define CPLD_IMG_MUX0	CPLD_OFFSET(2,3)

#define CPLD_IMG_MUX1	CPLD_OFFSET(3,0)

#define CPLD_IMG_DIR1	CPLD_OFFSET(3,1)

#define CPLD_IMG_MUX2	CPLD_OFFSET(3,2)

#define CPLD_IMG_MUX3	CPLD_OFFSET(3,3)

#define CPLD_IMG_DIR2	CPLD_OFFSET(4,0)

#define CPLD_IMG_MUX4	CPLD_OFFSET(4,1)

#define CPLD_IMG_MUX5	CPLD_OFFSET(4,2)



#define CPLD_RESETS	CPLD_OFFSET(4,3)



#define CPLD_CCD_DIR1	CPLD_OFFSET(0x3e,0)

#define CPLD_CCD_IO1	CPLD_OFFSET(0x3e,1)

#define CPLD_CCD_DIR2	CPLD_OFFSET(0x3e,2)

#define CPLD_CCD_IO2	CPLD_OFFSET(0x3e,3)

#define CPLD_CCD_DIR3	CPLD_OFFSET(0x3f,0)

#define CPLD_CCD_IO3	CPLD_OFFSET(0x3f,1)



static void __iomem *cpld;





/* NOTE:  this is geared for the standard config, with a socketed

/* NOTE:  this is geared for the standard config, with a socketed

 * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors.  If you

 * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors.  If you

 * swap chips with a different block size, partitioning will

 * swap chips with a different block size, partitioning will
@@ -135,7 +189,27 @@ static struct davinci_i2c_platform_data i2c_pdata = { 
	.bus_delay	= 0	/* usec */,

	.bus_delay	= 0	/* usec */,

};

};





static int cpld_mmc_get_cd(int module)

{

	if (!cpld)

		return -ENXIO;



	/* low == card present */

	return !(__raw_readb(cpld + CPLD_CARDSTAT) & BIT(module ? 4 : 0));

}



static int cpld_mmc_get_ro(int module)

{

	if (!cpld)

		return -ENXIO;



	/* high == card's write protect switch active */

	return !!(__raw_readb(cpld + CPLD_CARDSTAT) & BIT(module ? 5 : 1));

}



static struct davinci_mmc_config dm365evm_mmc_config = {

static struct davinci_mmc_config dm365evm_mmc_config = {

	.get_cd		= cpld_mmc_get_cd,

	.get_ro		= cpld_mmc_get_ro,

	.wires		= 4,

	.wires		= 4,

	.max_freq	= 50000000,

	.max_freq	= 50000000,

	.caps		= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,

	.caps		= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
@@ -199,10 +273,185 @@ static void __init evm_init_i2c(void) 
	i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));

	i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));

}

}





static struct platform_device *dm365_evm_devices[] __initdata = {

static struct platform_device *dm365_evm_nand_devices[] __initdata = {

	&davinci_nand_device,

	&davinci_nand_device,

};

};





static inline int have_leds(void)

{

#ifdef CONFIG_LEDS_CLASS

	return 1;

#else

	return 0;

#endif

}



struct cpld_led {

	struct led_classdev	cdev;

	u8			mask;

};



static const struct {

	const char *name;

	const char *trigger;

} cpld_leds[] = {

	{ "dm365evm::ds2", },

	{ "dm365evm::ds3", },

	{ "dm365evm::ds4", },

	{ "dm365evm::ds5", },

	{ "dm365evm::ds6", "nand-disk", },

	{ "dm365evm::ds7", "mmc1", },

	{ "dm365evm::ds8", "mmc0", },

	{ "dm365evm::ds9", "heartbeat", },

};



static void cpld_led_set(struct led_classdev *cdev, enum led_brightness b)

{

	struct cpld_led *led = container_of(cdev, struct cpld_led, cdev);

	u8 reg = __raw_readb(cpld + CPLD_LEDS);



	if (b != LED_OFF)

		reg &= ~led->mask;

	else

		reg |= led->mask;

	__raw_writeb(reg, cpld + CPLD_LEDS);

}



static enum led_brightness cpld_led_get(struct led_classdev *cdev)

{

	struct cpld_led *led = container_of(cdev, struct cpld_led, cdev);

	u8 reg = __raw_readb(cpld + CPLD_LEDS);



	return (reg & led->mask) ? LED_OFF : LED_FULL;

}



static int __init cpld_leds_init(void)

{

	int	i;



	if (!have_leds() ||  !cpld)

		return 0;



	/* setup LEDs */

	__raw_writeb(0xff, cpld + CPLD_LEDS);

	for (i = 0; i < ARRAY_SIZE(cpld_leds); i++) {

		struct cpld_led *led;



		led = kzalloc(sizeof(*led), GFP_KERNEL);

		if (!led)

			break;



		led->cdev.name = cpld_leds[i].name;

		led->cdev.brightness_set = cpld_led_set;

		led->cdev.brightness_get = cpld_led_get;

		led->cdev.default_trigger = cpld_leds[i].trigger;

		led->mask = BIT(i);



		if (led_classdev_register(NULL, &led->cdev) < 0) {

			kfree(led);

			break;

		}

	}



	return 0;

}

/* run after subsys_initcall() for LEDs */

fs_initcall(cpld_leds_init);





static void __init evm_init_cpld(void)

{

	u8 mux, resets;

	const char *label;

	struct clk *aemif_clk;



	/* Make sure we can configure the CPLD through CS1.  Then

	 * leave it on for later access to MMC and LED registers.

	 */

	aemif_clk = clk_get(NULL, "aemif");

	if (IS_ERR(aemif_clk))

		return;

	clk_enable(aemif_clk);



	if (request_mem_region(DM365_ASYNC_EMIF_DATA_CE1_BASE, SECTION_SIZE,

			"cpld") == NULL)

		goto fail;

	cpld = ioremap(DM365_ASYNC_EMIF_DATA_CE1_BASE, SECTION_SIZE);

	if (!cpld) {

		release_mem_region(DM365_ASYNC_EMIF_DATA_CE1_BASE,

				SECTION_SIZE);

fail:

		pr_err("ERROR: can't map CPLD\n");

		clk_disable(aemif_clk);

		return;

	}



	/* External muxing for some signals */

	mux = 0;



	/* Read SW5 to set up NAND + keypad _or_ OneNAND (sync read).

	 * NOTE:  SW4 bus width setting must match!

	 */

	if ((__raw_readb(cpld + CPLD_SWITCH) & BIT(5)) == 0) {

		/* external keypad mux */

		mux |= BIT(7);



		platform_add_devices(dm365_evm_nand_devices,

				ARRAY_SIZE(dm365_evm_nand_devices));

	} else {

		/* no OneNAND support yet */

	}



	/* Leave external chips in reset when unused. */

	resets = BIT(3) | BIT(2) | BIT(1) | BIT(0);



	/* Static video input config with SN74CBT16214 1-of-3 mux:

	 *  - port b1 == tvp7002 (mux lowbits == 1 or 6)

	 *  - port b2 == imager (mux lowbits == 2 or 7)

	 *  - port b3 == tvp5146 (mux lowbits == 5)

	 *

	 * Runtime switching could work too, with limitations.

	 */

	if (have_imager()) {

		label = "HD imager";

		mux |= 1;



		/* externally mux MMC1/ENET/AIC33 to imager */

		mux |= BIT(6) | BIT(5) | BIT(3);

	} else {

		struct davinci_soc_info *soc_info = &davinci_soc_info;



		/* we can use MMC1 ... */

		dm365evm_mmc_configure();

		davinci_setup_mmc(1, &dm365evm_mmc_config);



		/* ... and ENET ... */

		dm365evm_emac_configure();

		soc_info->emac_pdata->phy_mask = DM365_EVM_PHY_MASK;

		soc_info->emac_pdata->mdio_max_freq = DM365_EVM_MDIO_FREQUENCY;

		resets &= ~BIT(3);



		/* ... and AIC33 */

		resets &= ~BIT(1);



		if (have_tvp7002()) {

			mux |= 2;

			resets &= ~BIT(2);

			label = "tvp7002 HD";

		} else {

			/* default to tvp5146 */

			mux |= 5;

			resets &= ~BIT(0);

			label = "tvp5146 SD";

		}

	}

	__raw_writeb(mux, cpld + CPLD_MUX);

	__raw_writeb(resets, cpld + CPLD_RESETS);

	pr_info("EVM: %s video input\n", label);



	/* REVISIT export switches: NTSC/PAL (SW5.6), EXTRA1 (SW5.2), etc */

}



static struct davinci_uart_config uart_config __initdata = {

static struct davinci_uart_config uart_config __initdata = {

	.enabled_uarts = (1 << 0),

	.enabled_uarts = (1 << 0),

};

};
@@ -214,11 +463,6 @@ static void __init dm365_evm_map_io(void) 




static __init void dm365_evm_init(void)

static __init void dm365_evm_init(void)

{

{

	struct davinci_soc_info *soc_info = &davinci_soc_info;



	platform_add_devices(dm365_evm_devices,

				ARRAY_SIZE(dm365_evm_devices));



	evm_init_i2c();

	evm_init_i2c();

	davinci_serial_init(&uart_config);

	davinci_serial_init(&uart_config);
@@ -226,10 +470,9 @@ static __init void dm365_evm_init(void) 
	dm365evm_mmc_configure();

	dm365evm_mmc_configure();





	davinci_setup_mmc(0, &dm365evm_mmc_config);

	davinci_setup_mmc(0, &dm365evm_mmc_config);

	davinci_setup_mmc(1, &dm365evm_mmc_config);





	soc_info->emac_pdata->phy_mask = DM365_EVM_PHY_MASK;

	/* maybe setup mmc1/etc ... _after_ mmc0 */

	soc_info->emac_pdata->mdio_max_freq = DM365_EVM_MDIO_FREQUENCY;

	evm_init_cpld();

}

}





static __init void dm365_evm_irq_init(void)

static __init void dm365_evm_irq_init(void)