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Commit fea0bed1 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "scsi: ufs: update UFS initialization sequence"

parents ab6c1850 f35bc7e8
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+2 −1
Original line number Diff line number Diff line
@@ -161,7 +161,8 @@ struct ufs_qcom_phy {
 * @dbg_register_dump: pointer to a function that dumps phy registers for debug.
 */
struct ufs_qcom_phy_specific_ops {
	int (*calibrate_phy)(struct ufs_qcom_phy *phy, bool is_rate_B);
	int (*calibrate_phy)(struct ufs_qcom_phy *phy, bool is_rate_B,
			     bool is_g4);
	void (*start_serdes)(struct ufs_qcom_phy *phy);
	int (*is_physical_coding_sublayer_ready)(struct ufs_qcom_phy *phy);
	void (*set_tx_lane_enable)(struct ufs_qcom_phy *phy, u32 val);
+1 −1
Original line number Diff line number Diff line
@@ -18,7 +18,7 @@

static
int ufs_qcom_phy_qmp_v4_lito_phy_calibrate(struct ufs_qcom_phy *ufs_qcom_phy,
					bool is_rate_B)
					bool is_rate_B, bool is_g4)
{

	writel_relaxed(0x01, ufs_qcom_phy->mmio + UFS_PHY_SW_RESET);
+3 −5
Original line number Diff line number Diff line
@@ -18,10 +18,8 @@

static
int ufs_qcom_phy_qmp_v4_phy_calibrate(struct ufs_qcom_phy *ufs_qcom_phy,
					bool is_rate_B)
					bool is_rate_B, bool is_g4)
{
	struct device_node *np = ufs_qcom_phy->dev->of_node;

	writel_relaxed(0x01, ufs_qcom_phy->mmio + UFS_PHY_SW_RESET);
	/* Ensure PHY is in reset before writing PHY calibration data */
	wmb();
@@ -31,14 +29,14 @@ int ufs_qcom_phy_qmp_v4_phy_calibrate(struct ufs_qcom_phy *ufs_qcom_phy,
	 * 2. Write 2nd lane configuration if needed.
	 * 3. Write Rate-B calibration overrides
	 */
	if (of_device_is_compatible(np, "qcom,ufs-phy-qmp-v4")) {
	if (is_g4) {
		ufs_qcom_phy_write_tbl(ufs_qcom_phy, phy_cal_table_rate_A,
				       ARRAY_SIZE(phy_cal_table_rate_A));
		if (ufs_qcom_phy->lanes_per_direction == 2)
			ufs_qcom_phy_write_tbl(ufs_qcom_phy,
					phy_cal_table_2nd_lane,
					ARRAY_SIZE(phy_cal_table_2nd_lane));
	} else if (of_device_is_compatible(np, "qcom,ufs-phy-qmp-v4-card")) {
	} else {
		ufs_qcom_phy_write_tbl(ufs_qcom_phy, phy_cal_table_rate_A_no_g4,
				       ARRAY_SIZE(phy_cal_table_rate_A_no_g4));
		if (ufs_qcom_phy->lanes_per_direction == 2)
+1 −1
Original line number Diff line number Diff line
@@ -19,7 +19,7 @@

static
int ufs_qcom_phy_qrbtc_sdm845_phy_calibrate(struct ufs_qcom_phy *ufs_qcom_phy,
					bool is_rate_B)
					bool is_rate_B, bool is_g4)
{
	int err;
	int tbl_size_A, tbl_size_B;
+4 −2
Original line number Diff line number Diff line
@@ -669,7 +669,8 @@ void ufs_qcom_phy_save_controller_version(struct phy *generic_phy,
}
EXPORT_SYMBOL_GPL(ufs_qcom_phy_save_controller_version);

int ufs_qcom_phy_calibrate_phy(struct phy *generic_phy, bool is_rate_B)
int ufs_qcom_phy_calibrate_phy(struct phy *generic_phy, bool is_rate_B,
			       bool is_g4)
{
	struct ufs_qcom_phy *ufs_qcom_phy = get_ufs_qcom_phy(generic_phy);
	int ret = 0;
@@ -680,7 +681,8 @@ int ufs_qcom_phy_calibrate_phy(struct phy *generic_phy, bool is_rate_B)
		ret = -ENOTSUPP;
	} else {
		ret = ufs_qcom_phy->phy_spec_ops->calibrate_phy(ufs_qcom_phy,
								is_rate_B);
								is_rate_B,
								is_g4);
		if (ret)
			dev_err(ufs_qcom_phy->dev, "%s: calibrate_phy() failed %d\n",
				__func__, ret);
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