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Commit fe86131f authored by Vladimir Zapolskiy's avatar Vladimir Zapolskiy
Browse files

arm: dts: lpc32xx: add clock controller device node 



NXP LPC32xx SoC has a clocking and power control unit (CPC) as a part
of system control block (SCB). CPC is supplied by two external
oscillators and it manages core and most of peripheral clocks, the
change adds SCB and CPC descriptions to shared LPC32xx dtsi file.

Signed-off-by: default avatarVladimir Zapolskiy <vz@mleia.com>
parent ef5f885e

arch/arm/boot/dts/lpc32xx.dtsi

+17 −0
Original line number Diff line number Diff line
@@ -247,6 +247,23 @@ 
			compatible = "simple-bus";

			ranges = <0x20000000 0x20000000 0x30000000>;



			/* System Control Block */

			scb {

				compatible = "simple-bus";

				ranges = <0x0 0x040004000 0x00001000>;

				#address-cells = <1>;

				#size-cells = <1>;



				clk: clock-controller@0 {

					compatible = "nxp,lpc3220-clk";

					reg = <0x00 0x114>;

					#clock-cells = <1>;



					clocks = <&xtal_32k>, <&xtal>;

					clock-names = "xtal_32k", "xtal";

				};

			};



			/*

			 * MIC Interrupt controller includes:

			 *   MIC @40008000