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Commit fd3e14ff authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-next-4.5' of git://people.freedesktop.org/~agd5f/linux into drm-next 

[airlied: fixup build problems on arm - added errno.h include]
* 'drm-next-4.5' of git://people.freedesktop.org/~agd5f/linux: (152 commits)
  amd/powerplay: fix copy paste typo in hardwaremanager.c
  amd/powerplay: disable powerplay by default initially
  amd/powerplay: don't enable ucode fan control if vbios has no fan table
  drm/amd/powerplay: show gpu load when print gpu performance for Cz. (v2)
  drm/amd/powerplay: check whether need to enable thermal control. (v2)
  drm/amd/powerplay: add point check to avoid NULL point hang.
  drm/amdgpu/powerplay: Program a calculated value as Deep Sleep clock.
  drm/amd/powerplay: Don't return an error if fan table is missing
  drm/powerplay/hwmgr: log errors in tonga_hwmgr_backend_init
  drm/powerplay: add debugging output to processpptables.c
  drm/powerplay: add debugging output to tonga_processpptables.c
  amd/powerplay: Add structures required to report configuration change
  amd/powerplay: Fix get dal power level
  amd\powerplay Implement get dal power level
  drm/amd/powerplay: display gpu load when print performance for tonga.
  drm/amdgpu/powerplay: enable sysfs and debugfs interfaces late
  drm/amd/powerplay: move shared function of vi to hwmgr. (v2)
  drm/amd/powerplay: check whether enable dpm in powerplay.
  drm/amd/powerplay: fix bug that dpm funcs in debugfs/sysfs missing.
  drm/amd/powerplay: fix boolreturn.cocci warnings
  ...
parents 91161995 eafbbd98

drivers/gpu/drm/Kconfig

+1 −0
Original line number Original line Diff line number Diff line
@@ -160,6 +160,7 @@ config DRM_AMDGPU 
	  If M is selected, the module will be called amdgpu.

	  If M is selected, the module will be called amdgpu.





source "drivers/gpu/drm/amd/amdgpu/Kconfig"

source "drivers/gpu/drm/amd/amdgpu/Kconfig"

source "drivers/gpu/drm/amd/powerplay/Kconfig"





source "drivers/gpu/drm/nouveau/Kconfig"

source "drivers/gpu/drm/nouveau/Kconfig"

drivers/gpu/drm/amd/amdgpu/Makefile

+16 −4
Original line number Original line Diff line number Diff line
@@ -2,10 +2,13 @@ 
# Makefile for the drm device driver.  This driver provides support for the

# Makefile for the drm device driver.  This driver provides support for the

# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.

# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.





ccflags-y := -Iinclude/drm -Idrivers/gpu/drm/amd/include/asic_reg \

FULL_AMD_PATH=$(src)/..

	-Idrivers/gpu/drm/amd/include \



	-Idrivers/gpu/drm/amd/amdgpu \

ccflags-y := -Iinclude/drm -I$(FULL_AMD_PATH)/include/asic_reg \

	-Idrivers/gpu/drm/amd/scheduler

	-I$(FULL_AMD_PATH)/include \

	-I$(FULL_AMD_PATH)/amdgpu \

	-I$(FULL_AMD_PATH)/scheduler \

	-I$(FULL_AMD_PATH)/powerplay/inc





amdgpu-y := amdgpu_drv.o

amdgpu-y := amdgpu_drv.o
@@ -44,6 +47,7 @@ amdgpu-y += \ 
# add SMC block

# add SMC block

amdgpu-y += \

amdgpu-y += \

	amdgpu_dpm.o \

	amdgpu_dpm.o \

	amdgpu_powerplay.o \

	cz_smc.o cz_dpm.o \

	cz_smc.o cz_dpm.o \

	tonga_smc.o tonga_dpm.o \

	tonga_smc.o tonga_dpm.o \

	fiji_smc.o fiji_dpm.o \

	fiji_smc.o fiji_dpm.o \
@@ -94,6 +98,14 @@ amdgpu-$(CONFIG_VGA_SWITCHEROO) += amdgpu_atpx_handler.o 
amdgpu-$(CONFIG_ACPI) += amdgpu_acpi.o

amdgpu-$(CONFIG_ACPI) += amdgpu_acpi.o

amdgpu-$(CONFIG_MMU_NOTIFIER) += amdgpu_mn.o

amdgpu-$(CONFIG_MMU_NOTIFIER) += amdgpu_mn.o





ifneq ($(CONFIG_DRM_AMD_POWERPLAY),)



include $(FULL_AMD_PATH)/powerplay/Makefile



amdgpu-y += $(AMD_POWERPLAY_FILES)



endif



obj-$(CONFIG_DRM_AMDGPU)+= amdgpu.o

obj-$(CONFIG_DRM_AMDGPU)+= amdgpu.o





CFLAGS_amdgpu_trace_points.o := -I$(src)
 
CFLAGS_amdgpu_trace_points.o := -I$(src)

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+91 −47
Original line number Original line Diff line number Diff line
@@ -52,6 +52,7 @@ 
#include "amdgpu_irq.h"

#include "amdgpu_irq.h"

#include "amdgpu_ucode.h"

#include "amdgpu_ucode.h"

#include "amdgpu_gds.h"

#include "amdgpu_gds.h"

#include "amd_powerplay.h"





#include "gpu_scheduler.h"

#include "gpu_scheduler.h"
@@ -85,6 +86,7 @@ extern int amdgpu_enable_scheduler; 
extern int amdgpu_sched_jobs;

extern int amdgpu_sched_jobs;

extern int amdgpu_sched_hw_submission;

extern int amdgpu_sched_hw_submission;

extern int amdgpu_enable_semaphores;

extern int amdgpu_enable_semaphores;

extern int amdgpu_powerplay;





#define AMDGPU_WAIT_IDLE_TIMEOUT_IN_MS	        3000

#define AMDGPU_WAIT_IDLE_TIMEOUT_IN_MS	        3000

#define AMDGPU_MAX_USEC_TIMEOUT			100000	/* 100 ms */

#define AMDGPU_MAX_USEC_TIMEOUT			100000	/* 100 ms */
@@ -918,7 +920,7 @@ struct amdgpu_ring { 
#define AMDGPU_VM_FAULT_STOP_ALWAYS	2

#define AMDGPU_VM_FAULT_STOP_ALWAYS	2





struct amdgpu_vm_pt {

struct amdgpu_vm_pt {

	struct amdgpu_bo	*bo;

	struct amdgpu_bo_list_entry	entry;

	uint64_t			addr;

	uint64_t			addr;

};

};
@@ -981,9 +983,10 @@ struct amdgpu_vm_manager { 
void amdgpu_vm_manager_fini(struct amdgpu_device *adev);

void amdgpu_vm_manager_fini(struct amdgpu_device *adev);

int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm);

int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm);

void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm);

void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm);

struct amdgpu_bo_list_entry *amdgpu_vm_get_bos(struct amdgpu_device *adev,

void amdgpu_vm_get_pd_bo(struct amdgpu_vm *vm,

					       struct amdgpu_vm *vm,

			 struct list_head *validated,

					       struct list_head *head);

			 struct amdgpu_bo_list_entry *entry);

void amdgpu_vm_get_pt_bos(struct amdgpu_vm *vm, struct list_head *duplicates);

int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,

int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,

		      struct amdgpu_sync *sync);

		      struct amdgpu_sync *sync);

void amdgpu_vm_flush(struct amdgpu_ring *ring,

void amdgpu_vm_flush(struct amdgpu_ring *ring,
@@ -1024,11 +1027,9 @@ int amdgpu_vm_free_job(struct amdgpu_job *job); 
 * context related structures

 * context related structures

 */

 */





#define AMDGPU_CTX_MAX_CS_PENDING	16



struct amdgpu_ctx_ring {

struct amdgpu_ctx_ring {

	uint64_t		sequence;

	uint64_t		sequence;

	struct fence		*fences[AMDGPU_CTX_MAX_CS_PENDING];

	struct fence		**fences;

	struct amd_sched_entity	entity;

	struct amd_sched_entity	entity;

};

};
@@ -1037,6 +1038,7 @@ struct amdgpu_ctx { 
	struct amdgpu_device    *adev;

	struct amdgpu_device    *adev;

	unsigned		reset_counter;

	unsigned		reset_counter;

	spinlock_t		ring_lock;

	spinlock_t		ring_lock;

	struct fence            **fences;

	struct amdgpu_ctx_ring	rings[AMDGPU_MAX_RINGS];

	struct amdgpu_ctx_ring	rings[AMDGPU_MAX_RINGS];

};

};
@@ -1047,7 +1049,7 @@ struct amdgpu_ctx_mgr { 
	struct idr		ctx_handles;

	struct idr		ctx_handles;

};

};





int amdgpu_ctx_init(struct amdgpu_device *adev, bool kernel,

int amdgpu_ctx_init(struct amdgpu_device *adev, enum amd_sched_priority pri,

		    struct amdgpu_ctx *ctx);

		    struct amdgpu_ctx *ctx);

void amdgpu_ctx_fini(struct amdgpu_ctx *ctx);

void amdgpu_ctx_fini(struct amdgpu_ctx *ctx);
@@ -1254,7 +1256,7 @@ struct amdgpu_cs_parser { 
	unsigned		nchunks;

	unsigned		nchunks;

	struct amdgpu_cs_chunk	*chunks;

	struct amdgpu_cs_chunk	*chunks;

	/* relocations */

	/* relocations */

	struct amdgpu_bo_list_entry	*vm_bos;

	struct amdgpu_bo_list_entry	vm_pd;

	struct list_head	validated;

	struct list_head	validated;

	struct fence		*fence;

	struct fence		*fence;
@@ -1300,31 +1302,7 @@ struct amdgpu_wb { 
int amdgpu_wb_get(struct amdgpu_device *adev, u32 *wb);

int amdgpu_wb_get(struct amdgpu_device *adev, u32 *wb);

void amdgpu_wb_free(struct amdgpu_device *adev, u32 wb);

void amdgpu_wb_free(struct amdgpu_device *adev, u32 wb);





/**

 * struct amdgpu_pm - power management datas

 * It keeps track of various data needed to take powermanagement decision.

 */





enum amdgpu_pm_state_type {

	/* not used for dpm */

	POWER_STATE_TYPE_DEFAULT,

	POWER_STATE_TYPE_POWERSAVE,

	/* user selectable states */

	POWER_STATE_TYPE_BATTERY,

	POWER_STATE_TYPE_BALANCED,

	POWER_STATE_TYPE_PERFORMANCE,

	/* internal states */

	POWER_STATE_TYPE_INTERNAL_UVD,

	POWER_STATE_TYPE_INTERNAL_UVD_SD,

	POWER_STATE_TYPE_INTERNAL_UVD_HD,

	POWER_STATE_TYPE_INTERNAL_UVD_HD2,

	POWER_STATE_TYPE_INTERNAL_UVD_MVC,

	POWER_STATE_TYPE_INTERNAL_BOOT,

	POWER_STATE_TYPE_INTERNAL_THERMAL,

	POWER_STATE_TYPE_INTERNAL_ACPI,

	POWER_STATE_TYPE_INTERNAL_ULV,

	POWER_STATE_TYPE_INTERNAL_3DPERF,

};





enum amdgpu_int_thermal_type {

enum amdgpu_int_thermal_type {

	THERMAL_TYPE_NONE,

	THERMAL_TYPE_NONE,
@@ -1606,8 +1584,8 @@ struct amdgpu_dpm { 
	/* vce requirements */

	/* vce requirements */

	struct amdgpu_vce_state vce_states[AMDGPU_MAX_VCE_LEVELS];

	struct amdgpu_vce_state vce_states[AMDGPU_MAX_VCE_LEVELS];

	enum amdgpu_vce_level vce_level;

	enum amdgpu_vce_level vce_level;

	enum amdgpu_pm_state_type state;

	enum amd_pm_state_type state;

	enum amdgpu_pm_state_type user_state;

	enum amd_pm_state_type user_state;

	u32                     platform_caps;

	u32                     platform_caps;

	u32                     voltage_response_time;

	u32                     voltage_response_time;

	u32                     backbias_response_time;

	u32                     backbias_response_time;
@@ -1660,8 +1638,13 @@ struct amdgpu_pm { 
	const struct firmware	*fw;	/* SMC firmware */

	const struct firmware	*fw;	/* SMC firmware */

	uint32_t                fw_version;

	uint32_t                fw_version;

	const struct amdgpu_dpm_funcs *funcs;

	const struct amdgpu_dpm_funcs *funcs;

	uint32_t                pcie_gen_mask;

	uint32_t                pcie_mlw_mask;

	struct amd_pp_display_configuration pm_display_cfg;/* set by DAL */

};

};





void amdgpu_get_pcie_info(struct amdgpu_device *adev);



/*

/*

 * UVD

 * UVD

 */

 */
@@ -1829,6 +1812,8 @@ struct amdgpu_cu_info { 
 */

 */

struct amdgpu_asic_funcs {

struct amdgpu_asic_funcs {

	bool (*read_disabled_bios)(struct amdgpu_device *adev);

	bool (*read_disabled_bios)(struct amdgpu_device *adev);

	bool (*read_bios_from_rom)(struct amdgpu_device *adev,

				   u8 *bios, u32 length_bytes);

	int (*read_register)(struct amdgpu_device *adev, u32 se_num,

	int (*read_register)(struct amdgpu_device *adev, u32 se_num,

			     u32 sh_num, u32 reg_offset, u32 *value);

			     u32 sh_num, u32 reg_offset, u32 *value);

	void (*set_vga_state)(struct amdgpu_device *adev, bool state);

	void (*set_vga_state)(struct amdgpu_device *adev, bool state);
@@ -2059,6 +2044,10 @@ struct amdgpu_device { 
	/* interrupts */

	/* interrupts */

	struct amdgpu_irq		irq;

	struct amdgpu_irq		irq;





	/* powerplay */

	struct amd_powerplay		powerplay;

	bool				pp_enabled;



	/* dpm */

	/* dpm */

	struct amdgpu_pm		pm;

	struct amdgpu_pm		pm;

	u32				cg_flags;

	u32				cg_flags;
@@ -2235,6 +2224,7 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring) 
#define amdgpu_asic_set_vce_clocks(adev, ev, ec) (adev)->asic_funcs->set_vce_clocks((adev), (ev), (ec))

#define amdgpu_asic_set_vce_clocks(adev, ev, ec) (adev)->asic_funcs->set_vce_clocks((adev), (ev), (ec))

#define amdgpu_asic_get_gpu_clock_counter(adev) (adev)->asic_funcs->get_gpu_clock_counter((adev))

#define amdgpu_asic_get_gpu_clock_counter(adev) (adev)->asic_funcs->get_gpu_clock_counter((adev))

#define amdgpu_asic_read_disabled_bios(adev) (adev)->asic_funcs->read_disabled_bios((adev))

#define amdgpu_asic_read_disabled_bios(adev) (adev)->asic_funcs->read_disabled_bios((adev))

#define amdgpu_asic_read_bios_from_rom(adev, b, l) (adev)->asic_funcs->read_bios_from_rom((adev), (b), (l))

#define amdgpu_asic_read_register(adev, se, sh, offset, v)((adev)->asic_funcs->read_register((adev), (se), (sh), (offset), (v)))

#define amdgpu_asic_read_register(adev, se, sh, offset, v)((adev)->asic_funcs->read_register((adev), (se), (sh), (offset), (v)))

#define amdgpu_asic_get_cu_info(adev, info) (adev)->asic_funcs->get_cu_info((adev), (info))

#define amdgpu_asic_get_cu_info(adev, info) (adev)->asic_funcs->get_cu_info((adev), (info))

#define amdgpu_gart_flush_gpu_tlb(adev, vmid) (adev)->gart.gart_funcs->flush_gpu_tlb((adev), (vmid))

#define amdgpu_gart_flush_gpu_tlb(adev, vmid) (adev)->gart.gart_funcs->flush_gpu_tlb((adev), (vmid))
@@ -2276,24 +2266,78 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring) 
#define amdgpu_display_resume_mc_access(adev, s) (adev)->mode_info.funcs->resume_mc_access((adev), (s))

#define amdgpu_display_resume_mc_access(adev, s) (adev)->mode_info.funcs->resume_mc_access((adev), (s))

#define amdgpu_emit_copy_buffer(adev, ib, s, d, b) (adev)->mman.buffer_funcs->emit_copy_buffer((ib),  (s), (d), (b))

#define amdgpu_emit_copy_buffer(adev, ib, s, d, b) (adev)->mman.buffer_funcs->emit_copy_buffer((ib),  (s), (d), (b))

#define amdgpu_emit_fill_buffer(adev, ib, s, d, b) (adev)->mman.buffer_funcs->emit_fill_buffer((ib), (s), (d), (b))

#define amdgpu_emit_fill_buffer(adev, ib, s, d, b) (adev)->mman.buffer_funcs->emit_fill_buffer((ib), (s), (d), (b))

#define amdgpu_dpm_get_temperature(adev) (adev)->pm.funcs->get_temperature((adev))

#define amdgpu_dpm_pre_set_power_state(adev) (adev)->pm.funcs->pre_set_power_state((adev))

#define amdgpu_dpm_pre_set_power_state(adev) (adev)->pm.funcs->pre_set_power_state((adev))

#define amdgpu_dpm_set_power_state(adev) (adev)->pm.funcs->set_power_state((adev))

#define amdgpu_dpm_set_power_state(adev) (adev)->pm.funcs->set_power_state((adev))

#define amdgpu_dpm_post_set_power_state(adev) (adev)->pm.funcs->post_set_power_state((adev))

#define amdgpu_dpm_post_set_power_state(adev) (adev)->pm.funcs->post_set_power_state((adev))

#define amdgpu_dpm_display_configuration_changed(adev) (adev)->pm.funcs->display_configuration_changed((adev))

#define amdgpu_dpm_display_configuration_changed(adev) (adev)->pm.funcs->display_configuration_changed((adev))

#define amdgpu_dpm_get_sclk(adev, l) (adev)->pm.funcs->get_sclk((adev), (l))

#define amdgpu_dpm_get_mclk(adev, l) (adev)->pm.funcs->get_mclk((adev), (l))

#define amdgpu_dpm_print_power_state(adev, ps) (adev)->pm.funcs->print_power_state((adev), (ps))

#define amdgpu_dpm_print_power_state(adev, ps) (adev)->pm.funcs->print_power_state((adev), (ps))

#define amdgpu_dpm_debugfs_print_current_performance_level(adev, m) (adev)->pm.funcs->debugfs_print_current_performance_level((adev), (m))

#define amdgpu_dpm_force_performance_level(adev, l) (adev)->pm.funcs->force_performance_level((adev), (l))

#define amdgpu_dpm_vblank_too_short(adev) (adev)->pm.funcs->vblank_too_short((adev))

#define amdgpu_dpm_vblank_too_short(adev) (adev)->pm.funcs->vblank_too_short((adev))

#define amdgpu_dpm_powergate_uvd(adev, g) (adev)->pm.funcs->powergate_uvd((adev), (g))

#define amdgpu_dpm_powergate_vce(adev, g) (adev)->pm.funcs->powergate_vce((adev), (g))

#define amdgpu_dpm_enable_bapm(adev, e) (adev)->pm.funcs->enable_bapm((adev), (e))

#define amdgpu_dpm_enable_bapm(adev, e) (adev)->pm.funcs->enable_bapm((adev), (e))

#define amdgpu_dpm_set_fan_control_mode(adev, m) (adev)->pm.funcs->set_fan_control_mode((adev), (m))



#define amdgpu_dpm_get_fan_control_mode(adev) (adev)->pm.funcs->get_fan_control_mode((adev))

#define amdgpu_dpm_get_temperature(adev) \

#define amdgpu_dpm_set_fan_speed_percent(adev, s) (adev)->pm.funcs->set_fan_speed_percent((adev), (s))

	(adev)->pp_enabled ?						\

#define amdgpu_dpm_get_fan_speed_percent(adev, s) (adev)->pm.funcs->get_fan_speed_percent((adev), (s))

	      (adev)->powerplay.pp_funcs->get_temperature((adev)->powerplay.pp_handle) : \

	      (adev)->pm.funcs->get_temperature((adev))



#define amdgpu_dpm_set_fan_control_mode(adev, m) \

	(adev)->pp_enabled ?						\

	      (adev)->powerplay.pp_funcs->set_fan_control_mode((adev)->powerplay.pp_handle, (m)) : \

	      (adev)->pm.funcs->set_fan_control_mode((adev), (m))



#define amdgpu_dpm_get_fan_control_mode(adev) \

	(adev)->pp_enabled ?						\

	      (adev)->powerplay.pp_funcs->get_fan_control_mode((adev)->powerplay.pp_handle) : \

	      (adev)->pm.funcs->get_fan_control_mode((adev))



#define amdgpu_dpm_set_fan_speed_percent(adev, s) \

	(adev)->pp_enabled ?						\

	      (adev)->powerplay.pp_funcs->set_fan_speed_percent((adev)->powerplay.pp_handle, (s)) : \

	      (adev)->pm.funcs->set_fan_speed_percent((adev), (s))



#define amdgpu_dpm_get_fan_speed_percent(adev, s) \

	(adev)->pp_enabled ?						\

	      (adev)->powerplay.pp_funcs->get_fan_speed_percent((adev)->powerplay.pp_handle, (s)) : \

	      (adev)->pm.funcs->get_fan_speed_percent((adev), (s))



#define amdgpu_dpm_get_sclk(adev, l) \

	(adev)->pp_enabled ?						\

	      (adev)->powerplay.pp_funcs->get_sclk((adev)->powerplay.pp_handle, (l)) : \

		(adev)->pm.funcs->get_sclk((adev), (l))



#define amdgpu_dpm_get_mclk(adev, l)  \

	(adev)->pp_enabled ?						\

	      (adev)->powerplay.pp_funcs->get_mclk((adev)->powerplay.pp_handle, (l)) : \

	      (adev)->pm.funcs->get_mclk((adev), (l))





#define amdgpu_dpm_force_performance_level(adev, l) \

	(adev)->pp_enabled ?						\

	      (adev)->powerplay.pp_funcs->force_performance_level((adev)->powerplay.pp_handle, (l)) : \

	      (adev)->pm.funcs->force_performance_level((adev), (l))



#define amdgpu_dpm_powergate_uvd(adev, g) \

	(adev)->pp_enabled ?						\

	      (adev)->powerplay.pp_funcs->powergate_uvd((adev)->powerplay.pp_handle, (g)) : \

	      (adev)->pm.funcs->powergate_uvd((adev), (g))



#define amdgpu_dpm_powergate_vce(adev, g) \

	(adev)->pp_enabled ?						\

	      (adev)->powerplay.pp_funcs->powergate_vce((adev)->powerplay.pp_handle, (g)) : \

	      (adev)->pm.funcs->powergate_vce((adev), (g))



#define amdgpu_dpm_debugfs_print_current_performance_level(adev, m) \

	(adev)->pp_enabled ?						\

	      (adev)->powerplay.pp_funcs->print_current_performance_level((adev)->powerplay.pp_handle, (m)) : \

	      (adev)->pm.funcs->debugfs_print_current_performance_level((adev), (m))



#define amdgpu_dpm_get_current_power_state(adev) \

	(adev)->powerplay.pp_funcs->get_current_power_state((adev)->powerplay.pp_handle)



#define amdgpu_dpm_get_performance_level(adev) \

	(adev)->powerplay.pp_funcs->get_performance_level((adev)->powerplay.pp_handle)



#define amdgpu_dpm_dispatch_task(adev, event_id, input, output)		\

	(adev)->powerplay.pp_funcs->dispatch_tasks((adev)->powerplay.pp_handle, (event_id), (input), (output))





#define amdgpu_gds_switch(adev, r, v, d, w, a) (adev)->gds.funcs->patch_gds_switch((r), (v), (d), (w), (a))

#define amdgpu_gds_switch(adev, r, v, d, w, a) (adev)->gds.funcs->patch_gds_switch((r), (v), (d), (w), (a))

drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c

+1 −57
Original line number Original line Diff line number Diff line
@@ -29,66 +29,10 @@ 
#include <drm/drmP.h>

#include <drm/drmP.h>

#include <drm/drm_crtc_helper.h>

#include <drm/drm_crtc_helper.h>

#include "amdgpu.h"

#include "amdgpu.h"

#include "amdgpu_acpi.h"

#include "amd_acpi.h"

#include "atom.h"

#include "atom.h"





#define ACPI_AC_CLASS           "ac_adapter"



extern void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev);

extern void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev);



struct atif_verify_interface {

	u16 size;		/* structure size in bytes (includes size field) */

	u16 version;		/* version */

	u32 notification_mask;	/* supported notifications mask */

	u32 function_bits;	/* supported functions bit vector */

} __packed;



struct atif_system_params {

	u16 size;		/* structure size in bytes (includes size field) */

	u32 valid_mask;		/* valid flags mask */

	u32 flags;		/* flags */

	u8 command_code;	/* notify command code */

} __packed;



struct atif_sbios_requests {

	u16 size;		/* structure size in bytes (includes size field) */

	u32 pending;		/* pending sbios requests */

	u8 panel_exp_mode;	/* panel expansion mode */

	u8 thermal_gfx;		/* thermal state: target gfx controller */

	u8 thermal_state;	/* thermal state: state id (0: exit state, non-0: state) */

	u8 forced_power_gfx;	/* forced power state: target gfx controller */

	u8 forced_power_state;	/* forced power state: state id */

	u8 system_power_src;	/* system power source */

	u8 backlight_level;	/* panel backlight level (0-255) */

} __packed;



#define ATIF_NOTIFY_MASK	0x3

#define ATIF_NOTIFY_NONE	0

#define ATIF_NOTIFY_81		1

#define ATIF_NOTIFY_N		2



struct atcs_verify_interface {

	u16 size;		/* structure size in bytes (includes size field) */

	u16 version;		/* version */

	u32 function_bits;	/* supported functions bit vector */

} __packed;



#define ATCS_VALID_FLAGS_MASK	0x3



struct atcs_pref_req_input {

	u16 size;		/* structure size in bytes (includes size field) */

	u16 client_id;		/* client id (bit 2-0: func num, 7-3: dev num, 15-8: bus num) */

	u16 valid_flags_mask;	/* valid flags mask */

	u16 flags;		/* flags */

	u8 req_type;		/* request type */

	u8 perf_req;		/* performance request */

} __packed;



struct atcs_pref_req_output {

	u16 size;		/* structure size in bytes (includes size field) */

	u8 ret_val;		/* return value */

} __packed;



/* Call the ATIF method

/* Call the ATIF method

 */

 */

/**

/**

drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -11,7 +11,7 @@ 
#include <linux/acpi.h>

#include <linux/acpi.h>

#include <linux/pci.h>

#include <linux/pci.h>





#include "amdgpu_acpi.h"

#include "amd_acpi.h"





struct amdgpu_atpx_functions {

struct amdgpu_atpx_functions {

	bool px_params;

	bool px_params;