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Commit fd172d0c authored by Dave Airlie's avatar Dave Airlie
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Merge tag 'drm-intel-next-2014-11-07-fixups' of... 

Merge tag 'drm-intel-next-2014-11-07-fixups' of git://anongit.freedesktop.org/drm-intel into drm-next

- skl watermarks code (Damien, Vandana, Pradeep)
- reworked audio codec /eld handling code (Jani)
- rework the mmio_flip code to use the vblank evade logic and wait for rendering
  using the standard wait_seqno interface (Ander)
- skl forcewake support (Zhe Wang)
- refactor the chv interrupt code to use functions shared with vlv (Ville)
- prep work for different global gtt views (Tvrtko Ursulin)
- precompute the display PLL config before touching hw state (Ander)
- completely reworked panel power sequencer code for chv/vlv (Ville)
- pre work to split the plane update code into a prepare and commit phase
  (Gustavo Padovan)
- golden context for skl (Armin Reese)
- as usual tons of fixes and improvements all over

* tag 'drm-intel-next-2014-11-07-fixups' of git://anongit.freedesktop.org/drm-intel: (135 commits)
  drm/i915: Use correct pipe config to update pll dividers. V2
  drm/i915: Plug memory leak in intel_shared_dpll_start_config()
  drm/i915: Update DRIVER_DATE to 20141107
  drm/i915: Add gen to the gpu hang ecode
  drm/i915: Cache HPLL frequency on VLV/CHV
  Revert "drm/i915/vlv: Remove check for Old Ack during forcewake"
  drm/i915: Make mmio flip wait for seqno in the work function
  drm/i915: Make __wait_seqno non-static and rename to __i915_wait_seqno
  drm/i915: Move the .global_resources() hook call into modeset_update_crtc_power_domains()
  drm/i915/audio: add DOC comment describing HDA over HDMI/DP
  drm/i915: make pipe/port based audio valid accessors easier to use
  drm/i915/audio: add audio codec enable debug log for g4x
  drm/i915/audio: add audio codec disable on g4x
  drm/i915: enable audio codec after port
  drm/i915/audio: add vlv/chv/gen5-7 audio codec disable sequence
  drm/i915/audio: rewrite vlv/chv and gen 5-7 audio codec enable sequence
  drm/i915/skl: Enable Gen9 RC6
  drm/i915/skl: Gen9 Forcewake
  drm/i915/skl: Log the order in which we flush the pipes in the WM code
  drm/i915/skl: Flush the WM configuration
  ...
parents b853fdb3 e1f234bd

Documentation/DocBook/drm.tmpl

+5 −0
Original line number Diff line number Diff line
@@ -3887,6 +3887,11 @@ int num_ioctls;</synopsis> 
	  probing, so those sections fully apply.

        </para>

      </sect2>

      <sect2>

	<title>High Definition Audio</title>

!Pdrivers/gpu/drm/i915/intel_audio.c High Definition Audio over HDMI and Display Port

!Idrivers/gpu/drm/i915/intel_audio.c

      </sect2>

      <sect2>

        <title>DPIO</title>

!Pdrivers/gpu/drm/i915/i915_reg.h DPIO

drivers/gpu/drm/drm_plane_helper.c

+5 −0
Original line number Diff line number Diff line
@@ -155,6 +155,11 @@ int drm_plane_helper_check_update(struct drm_plane *plane, 
		return -ERANGE;

	}



	if (!fb) {

		*visible = false;

		return 0;

	}



	*visible = drm_rect_clip_scaled(src, dest, clip, hscale, vscale);

	if (!*visible)

		/*

drivers/gpu/drm/i915/Makefile

+4 −2
Original line number Diff line number Diff line
@@ -40,10 +40,12 @@ i915-y += i915_cmd_parser.o \ 
# autogenerated null render state

i915-y += intel_renderstate_gen6.o \

	  intel_renderstate_gen7.o \

	  intel_renderstate_gen8.o

	  intel_renderstate_gen8.o \

	  intel_renderstate_gen9.o



# modesetting core code

i915-y += intel_bios.o \

i915-y += intel_audio.o \

	  intel_bios.o \

	  intel_display.o \

	  intel_fifo_underrun.o \

	  intel_frontbuffer.o \

drivers/gpu/drm/i915/i915_cmd_parser.c

+17 −1
Original line number Diff line number Diff line
@@ -138,6 +138,11 @@ static const struct drm_i915_cmd_descriptor common_cmds[] = { 
			.mask = MI_GLOBAL_GTT,

			.expected = 0,

	      }},						       ),

	/*

	 * MI_BATCH_BUFFER_START requires some special handling. It's not

	 * really a 'skip' action but it doesn't seem like it's worth adding

	 * a new action. See i915_parse_cmds().

	 */

	CMD(  MI_BATCH_BUFFER_START,            SMI,   !F,  0xFF,   S  ),

};
@@ -955,7 +960,8 @@ static bool check_cmd(const struct intel_engine_cs *ring, 
 * Parses the specified batch buffer looking for privilege violations as

 * described in the overview.

 *

 * Return: non-zero if the parser finds violations or otherwise fails

 * Return: non-zero if the parser finds violations or otherwise fails; -EACCES

 * if the batch appears legal but should use hardware parsing

 */

int i915_parse_cmds(struct intel_engine_cs *ring,

		    struct drm_i915_gem_object *batch_obj,
@@ -1002,6 +1008,16 @@ int i915_parse_cmds(struct intel_engine_cs *ring, 
			break;

		}



		/*

		 * If the batch buffer contains a chained batch, return an

		 * error that tells the caller to abort and dispatch the

		 * workload as a non-secure batch.

		 */

		if (desc->cmd.value == MI_BATCH_BUFFER_START) {

			ret = -EACCES;

			break;

		}



		if (desc->flags & CMD_DESC_FIXED)

			length = desc->length.fixed;

		else

drivers/gpu/drm/i915/i915_debugfs.c

+110 −22
Original line number Diff line number Diff line
@@ -116,7 +116,7 @@ static const char *get_tiling_flag(struct drm_i915_gem_object *obj) 


static inline const char *get_global_flag(struct drm_i915_gem_object *obj)

{

	return obj->has_global_gtt_mapping ? "g" : " ";

	return i915_gem_obj_to_ggtt(obj) ? "g" : " ";

}



static void
@@ -2630,14 +2630,15 @@ static int i915_shared_dplls_info(struct seq_file *m, void *unused) 
		struct intel_shared_dpll *pll = &dev_priv->shared_dplls[i];



		seq_printf(m, "DPLL%i: %s, id: %i\n", i, pll->name, pll->id);

		seq_printf(m, " refcount: %i, active: %i, on: %s\n", pll->refcount,

			   pll->active, yesno(pll->on));

		seq_printf(m, " crtc_mask: 0x%08x, active: %d, on: %s\n",

			   pll->config.crtc_mask, pll->active, yesno(pll->on));

		seq_printf(m, " tracked hardware state:\n");

		seq_printf(m, " dpll:    0x%08x\n", pll->hw_state.dpll);

		seq_printf(m, " dpll_md: 0x%08x\n", pll->hw_state.dpll_md);

		seq_printf(m, " fp0:     0x%08x\n", pll->hw_state.fp0);

		seq_printf(m, " fp1:     0x%08x\n", pll->hw_state.fp1);

		seq_printf(m, " wrpll:   0x%08x\n", pll->hw_state.wrpll);

		seq_printf(m, " dpll:    0x%08x\n", pll->config.hw_state.dpll);

		seq_printf(m, " dpll_md: 0x%08x\n",

			   pll->config.hw_state.dpll_md);

		seq_printf(m, " fp0:     0x%08x\n", pll->config.hw_state.fp0);

		seq_printf(m, " fp1:     0x%08x\n", pll->config.hw_state.fp1);

		seq_printf(m, " wrpll:   0x%08x\n", pll->config.hw_state.wrpll);

	}

	drm_modeset_unlock_all(dev);
@@ -2678,6 +2679,42 @@ static int i915_wa_registers(struct seq_file *m, void *unused) 
	return 0;

}



static int i915_ddb_info(struct seq_file *m, void *unused)

{

	struct drm_info_node *node = m->private;

	struct drm_device *dev = node->minor->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct skl_ddb_allocation *ddb;

	struct skl_ddb_entry *entry;

	enum pipe pipe;

	int plane;



	drm_modeset_lock_all(dev);



	ddb = &dev_priv->wm.skl_hw.ddb;



	seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size");



	for_each_pipe(dev_priv, pipe) {

		seq_printf(m, "Pipe %c\n", pipe_name(pipe));



		for_each_plane(pipe, plane) {

			entry = &ddb->plane[pipe][plane];

			seq_printf(m, "  Plane%-8d%8u%8u%8u\n", plane + 1,

				   entry->start, entry->end,

				   skl_ddb_entry_size(entry));

		}



		entry = &ddb->cursor[pipe];

		seq_printf(m, "  %-13s%8u%8u%8u\n", "Cursor", entry->start,

			   entry->end, skl_ddb_entry_size(entry));

	}



	drm_modeset_unlock_all(dev);



	return 0;

}



struct pipe_crc_info {

	const char *name;

	struct drm_device *dev;
@@ -2971,6 +3008,8 @@ static int i9xx_pipe_crc_auto_source(struct drm_device *dev, enum pipe pipe, 
				break;

			}

			break;

		default:

			break;

		}

	}

	drm_modeset_unlock_all(dev);
@@ -3520,7 +3559,7 @@ static const struct file_operations i915_display_crc_ctl_fops = { 
	.write = display_crc_ctl_write

};



static void wm_latency_show(struct seq_file *m, const uint16_t wm[5])

static void wm_latency_show(struct seq_file *m, const uint16_t wm[8])

{

	struct drm_device *dev = m->private;

	int num_levels = ilk_wm_max_level(dev) + 1;
@@ -3531,13 +3570,17 @@ static void wm_latency_show(struct seq_file *m, const uint16_t wm[5]) 
	for (level = 0; level < num_levels; level++) {

		unsigned int latency = wm[level];



		/* WM1+ latency values in 0.5us units */

		if (level > 0)

		/*

		 * - WM1+ latency values in 0.5us units

		 * - latencies are in us on gen9

		 */

		if (INTEL_INFO(dev)->gen >= 9)

			latency *= 10;

		else if (level > 0)

			latency *= 5;



		seq_printf(m, "WM%d %u (%u.%u usec)\n",

			   level, wm[level],

			   latency / 10, latency % 10);

			   level, wm[level], latency / 10, latency % 10);

	}



	drm_modeset_unlock_all(dev);
@@ -3546,8 +3589,15 @@ static void wm_latency_show(struct seq_file *m, const uint16_t wm[5]) 
static int pri_wm_latency_show(struct seq_file *m, void *data)

{

	struct drm_device *dev = m->private;

	struct drm_i915_private *dev_priv = dev->dev_private;

	const uint16_t *latencies;



	if (INTEL_INFO(dev)->gen >= 9)

		latencies = dev_priv->wm.skl_latency;

	else

		latencies = to_i915(dev)->wm.pri_latency;



	wm_latency_show(m, to_i915(dev)->wm.pri_latency);

	wm_latency_show(m, latencies);



	return 0;

}
@@ -3555,8 +3605,15 @@ static int pri_wm_latency_show(struct seq_file *m, void *data) 
static int spr_wm_latency_show(struct seq_file *m, void *data)

{

	struct drm_device *dev = m->private;

	struct drm_i915_private *dev_priv = dev->dev_private;

	const uint16_t *latencies;



	if (INTEL_INFO(dev)->gen >= 9)

		latencies = dev_priv->wm.skl_latency;

	else

		latencies = to_i915(dev)->wm.spr_latency;



	wm_latency_show(m, to_i915(dev)->wm.spr_latency);

	wm_latency_show(m, latencies);



	return 0;

}
@@ -3564,8 +3621,15 @@ static int spr_wm_latency_show(struct seq_file *m, void *data) 
static int cur_wm_latency_show(struct seq_file *m, void *data)

{

	struct drm_device *dev = m->private;

	struct drm_i915_private *dev_priv = dev->dev_private;

	const uint16_t *latencies;



	wm_latency_show(m, to_i915(dev)->wm.cur_latency);

	if (INTEL_INFO(dev)->gen >= 9)

		latencies = dev_priv->wm.skl_latency;

	else

		latencies = to_i915(dev)->wm.cur_latency;



	wm_latency_show(m, latencies);



	return 0;

}
@@ -3601,11 +3665,11 @@ static int cur_wm_latency_open(struct inode *inode, struct file *file) 
}



static ssize_t wm_latency_write(struct file *file, const char __user *ubuf,

				size_t len, loff_t *offp, uint16_t wm[5])

				size_t len, loff_t *offp, uint16_t wm[8])

{

	struct seq_file *m = file->private_data;

	struct drm_device *dev = m->private;

	uint16_t new[5] = { 0 };

	uint16_t new[8] = { 0 };

	int num_levels = ilk_wm_max_level(dev) + 1;

	int level;

	int ret;
@@ -3619,7 +3683,9 @@ static ssize_t wm_latency_write(struct file *file, const char __user *ubuf, 


	tmp[len] = '\0';



	ret = sscanf(tmp, "%hu %hu %hu %hu %hu", &new[0], &new[1], &new[2], &new[3], &new[4]);

	ret = sscanf(tmp, "%hu %hu %hu %hu %hu %hu %hu %hu",

		     &new[0], &new[1], &new[2], &new[3],

		     &new[4], &new[5], &new[6], &new[7]);

	if (ret != num_levels)

		return -EINVAL;
@@ -3639,8 +3705,15 @@ static ssize_t pri_wm_latency_write(struct file *file, const char __user *ubuf, 
{

	struct seq_file *m = file->private_data;

	struct drm_device *dev = m->private;

	struct drm_i915_private *dev_priv = dev->dev_private;

	uint16_t *latencies;



	return wm_latency_write(file, ubuf, len, offp, to_i915(dev)->wm.pri_latency);

	if (INTEL_INFO(dev)->gen >= 9)

		latencies = dev_priv->wm.skl_latency;

	else

		latencies = to_i915(dev)->wm.pri_latency;



	return wm_latency_write(file, ubuf, len, offp, latencies);

}



static ssize_t spr_wm_latency_write(struct file *file, const char __user *ubuf,
@@ -3648,8 +3721,15 @@ static ssize_t spr_wm_latency_write(struct file *file, const char __user *ubuf, 
{

	struct seq_file *m = file->private_data;

	struct drm_device *dev = m->private;

	struct drm_i915_private *dev_priv = dev->dev_private;

	uint16_t *latencies;



	return wm_latency_write(file, ubuf, len, offp, to_i915(dev)->wm.spr_latency);

	if (INTEL_INFO(dev)->gen >= 9)

		latencies = dev_priv->wm.skl_latency;

	else

		latencies = to_i915(dev)->wm.spr_latency;



	return wm_latency_write(file, ubuf, len, offp, latencies);

}



static ssize_t cur_wm_latency_write(struct file *file, const char __user *ubuf,
@@ -3657,8 +3737,15 @@ static ssize_t cur_wm_latency_write(struct file *file, const char __user *ubuf, 
{

	struct seq_file *m = file->private_data;

	struct drm_device *dev = m->private;

	struct drm_i915_private *dev_priv = dev->dev_private;

	uint16_t *latencies;



	if (INTEL_INFO(dev)->gen >= 9)

		latencies = dev_priv->wm.skl_latency;

	else

		latencies = to_i915(dev)->wm.cur_latency;



	return wm_latency_write(file, ubuf, len, offp, to_i915(dev)->wm.cur_latency);

	return wm_latency_write(file, ubuf, len, offp, latencies);

}



static const struct file_operations i915_pri_wm_latency_fops = {
@@ -4201,6 +4288,7 @@ static const struct drm_info_list i915_debugfs_list[] = { 
	{"i915_shared_dplls_info", i915_shared_dplls_info, 0},

	{"i915_dp_mst_info", i915_dp_mst_info, 0},

	{"i915_wa_registers", i915_wa_registers, 0},

	{"i915_ddb_info", i915_ddb_info, 0},

};

#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)