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Commit fcef7c22 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "defconfig: Enable MPM support"

parents 2396f03c ed3be7e4

arch/arm64/configs/vendor/bengal-perf_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -472,6 +472,7 @@ CONFIG_IIO=y 
CONFIG_QCOM_SPMI_ADC5=y

CONFIG_PWM=y

CONFIG_ARM_GIC_V3_ACL=y

CONFIG_QCOM_MPM=y

CONFIG_PHY_XGENE=y

CONFIG_RAS=y

CONFIG_ANDROID=y

arch/arm64/configs/vendor/bengal_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -495,6 +495,7 @@ CONFIG_IIO=y 
CONFIG_QCOM_SPMI_ADC5=y

CONFIG_PWM=y

CONFIG_ARM_GIC_V3_ACL=y

CONFIG_QCOM_MPM=y

CONFIG_PHY_XGENE=y

CONFIG_RAS=y

CONFIG_ANDROID=y

drivers/irqchip/Kconfig

+11 −0
Original line number Diff line number Diff line
@@ -391,6 +391,17 @@ config QCOM_PDC 
	  Power Domain Controller driver to manage and configure wakeup

	  IRQs for Qualcomm Technologies Inc (QTI) mobile chips.



config QCOM_MPM

	bool "QCOM MPM"

	depends on ARCH_QCOM

	select IRQ_DOMAIN

	select IRQ_DOMAIN_HIERARCHY

	help

	  MSM Power Manager driver to manage and configure wakeup

	  IRQs for Qualcomm Technologies Inc (QTI) mobile chips.

	  Say yes here to enable the MSM Power Manager interrupt

	  controller to use as a wakeup interrupt controller.



endmenu



config SIFIVE_PLIC

drivers/irqchip/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -88,4 +88,5 @@ obj-$(CONFIG_MESON_IRQ_GPIO) += irq-meson-gpio.o 
obj-$(CONFIG_GOLDFISH_PIC) 		+= irq-goldfish-pic.o

obj-$(CONFIG_NDS32)			+= irq-ativic32.o

obj-$(CONFIG_QCOM_PDC)			+= qcom-pdc.o

obj-$(CONFIG_QCOM_MPM)			+= qcom-mpm.o qcom-mpm-bengal.o

obj-$(CONFIG_SIFIVE_PLIC)		+= irq-sifive-plic.o

drivers/irqchip/qcom-mpm-bengal.c

0 → 100644
+15 −0
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// SPDX-License-Identifier: GPL-2.0-only



/*

 * Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.

 */



#include <soc/qcom/mpm.h>

const struct mpm_pin mpm_bengal_gic_chip_data[] = {

	{2, 222},

	{12, 454}, /* b3_lfps_rxterm_irq */

	{86, 215}, /* mpm_wake,spmi_m */

	{90, 292}, /* eud_p0_dpse_int_mx */

	{91, 292}, /* eud_p0_dmse_int_mx */

	{-1},

};