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Commit fcb5ee0a authored by Jilai Wang's avatar Jilai Wang
Browse files

msm: npu: Enable system cache 



This change is to enable NPU system cache.

Change-Id: I4adc101b184fe9bfe61fbfb39db7f69a04e7c6e6
Signed-off-by: default avatarJilai Wang <jilaiw@codeaurora.org>
parent fb0fd749

drivers/media/platform/msm/npu/npu_dev.c

+23 −7
Original line number Diff line number Diff line
@@ -744,13 +744,29 @@ int npu_enable_sys_cache(struct npu_device *npu_dev) 
		}



		/* set npu side regs - program SCID */

		reg_val = NPU_CACHE_ATTR_IDn___POR | SYS_CACHE_SCID;



		REGW(npu_dev, NPU_CACHE_ATTR_IDn(0), reg_val);

		REGW(npu_dev, NPU_CACHE_ATTR_IDn(1), reg_val);

		REGW(npu_dev, NPU_CACHE_ATTR_IDn(2), reg_val);

		REGW(npu_dev, NPU_CACHE_ATTR_IDn(3), reg_val);

		REGW(npu_dev, NPU_CACHE_ATTR_IDn(4), reg_val);

		reg_val = REGR(npu_dev, NPU_CACHEMAP0_ATTR_IDn(0));

		reg_val = (reg_val & ~NPU_CACHEMAP_SCID_MASK) | SYS_CACHE_SCID;



		REGW(npu_dev, NPU_CACHEMAP0_ATTR_IDn(0), reg_val);

		REGW(npu_dev, NPU_CACHEMAP0_ATTR_IDn(1), reg_val);

		REGW(npu_dev, NPU_CACHEMAP0_ATTR_IDn(2), reg_val);

		REGW(npu_dev, NPU_CACHEMAP0_ATTR_IDn(3), reg_val);

		REGW(npu_dev, NPU_CACHEMAP0_ATTR_IDn(4), reg_val);

		REGW(npu_dev, NPU_CACHEMAP0_ATTR_METADATA_IDn(0), reg_val);

		REGW(npu_dev, NPU_CACHEMAP0_ATTR_METADATA_IDn(1), reg_val);

		REGW(npu_dev, NPU_CACHEMAP0_ATTR_METADATA_IDn(2), reg_val);

		REGW(npu_dev, NPU_CACHEMAP0_ATTR_METADATA_IDn(3), reg_val);

		REGW(npu_dev, NPU_CACHEMAP0_ATTR_METADATA_IDn(4), reg_val);

		REGW(npu_dev, NPU_CACHEMAP1_ATTR_IDn(0), reg_val);

		REGW(npu_dev, NPU_CACHEMAP1_ATTR_IDn(1), reg_val);

		REGW(npu_dev, NPU_CACHEMAP1_ATTR_IDn(2), reg_val);

		REGW(npu_dev, NPU_CACHEMAP1_ATTR_IDn(3), reg_val);

		REGW(npu_dev, NPU_CACHEMAP1_ATTR_IDn(4), reg_val);

		REGW(npu_dev, NPU_CACHEMAP1_ATTR_METADATA_IDn(0), reg_val);

		REGW(npu_dev, NPU_CACHEMAP1_ATTR_METADATA_IDn(1), reg_val);

		REGW(npu_dev, NPU_CACHEMAP1_ATTR_METADATA_IDn(2), reg_val);

		REGW(npu_dev, NPU_CACHEMAP1_ATTR_METADATA_IDn(3), reg_val);

		REGW(npu_dev, NPU_CACHEMAP1_ATTR_METADATA_IDn(4), reg_val);



		pr_debug("prior to activate sys cache\n");

		rc = llcc_slice_activate(npu_dev->sys_cache);

drivers/media/platform/msm/npu/npu_hw.h

+5 −2
Original line number Diff line number Diff line
@@ -12,8 +12,11 @@ 
 */

#define NPU_HW_VERSION (0x00000000)

#define NPU_MASTERn_IPC_IRQ_OUT(n) (0x00001004+0x1000*(n))

#define NPU_CACHE_ATTR_IDn___POR 0x00011100

#define NPU_CACHE_ATTR_IDn(n) (0x00000800+0x4*(n))

#define NPU_CACHEMAP0_ATTR_IDn(n) (0x00000800+0x4*(n))

#define NPU_CACHEMAP0_ATTR_METADATA_IDn(n) (0x00000814+0x4*(n))

#define NPU_CACHEMAP1_ATTR_IDn(n) (0x00000830+0x4*(n))

#define NPU_CACHEMAP1_ATTR_METADATA_IDn(n) (0x00000844+0x4*(n))

#define NPU_CACHEMAP_SCID_MASK 0x0000001F

#define NPU_MASTERn_IPC_IRQ_IN_CTRL(n) (0x00001008+0x1000*(n))

#define NPU_MASTER0_IPC_IRQ_IN_CTRL__IRQ_SOURCE_SELECT___S 4

#define NPU_MASTERn_IPC_IRQ_OUT_CTRL(n) (0x00001004+0x1000*(n))

drivers/media/platform/msm/npu/npu_mgr.c

+0 −1
Original line number Diff line number Diff line
@@ -277,7 +277,6 @@ int npu_host_init(struct npu_device *npu_dev) 
	mutex_init(&host_ctx->lock);

	atomic_set(&host_ctx->ipc_trans_id, 1);



	host_ctx->sys_cache_disable = true;

	host_ctx->wq = npu_create_wq(host_ctx, "irq_hdl", host_irq_wq,

		&host_ctx->irq_work);

	if (!host_ctx->wq)