Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit fca04aea authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Mark Brown
Browse files

ASoC: am3517evm: Do not configure McBSP1 CLKR/FSR signal muxing 



The muxing is done at board level, no need to do it in the ASoC machine
driver.

Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: default avatarJarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
parent 6253bac8

sound/soc/omap/am3517evm.c

+2 −18
Original line number Original line Diff line number Diff line
@@ -47,28 +47,12 @@ static int am3517evm_hw_params(struct snd_pcm_substream *substream, 
	/* Set the codec system clock for DAC and ADC */

	/* Set the codec system clock for DAC and ADC */

	ret = snd_soc_dai_set_sysclk(codec_dai, 0,

	ret = snd_soc_dai_set_sysclk(codec_dai, 0,

			CODEC_CLOCK, SND_SOC_CLOCK_IN);

			CODEC_CLOCK, SND_SOC_CLOCK_IN);

	if (ret < 0) {

	if (ret < 0)

		printk(KERN_ERR "can't set codec system clock\n");

		printk(KERN_ERR "can't set codec system clock\n");

		return ret;

	}



	ret = snd_soc_dai_set_sysclk(cpu_dai, OMAP_MCBSP_CLKR_SRC_CLKX, 0,

				SND_SOC_CLOCK_IN);

	if (ret < 0) {

		printk(KERN_ERR "can't set CPU system clock OMAP_MCBSP_CLKR_SRC_CLKX\n");

		return ret;

	}





	snd_soc_dai_set_sysclk(cpu_dai, OMAP_MCBSP_FSR_SRC_FSX, 0,

				SND_SOC_CLOCK_IN);

	if (ret < 0) {

		printk(KERN_ERR "can't set CPU system clock OMAP_MCBSP_FSR_SRC_FSX\n");

	return ret;

	return ret;

}

}





	return 0;

}



static struct snd_soc_ops am3517evm_ops = {

static struct snd_soc_ops am3517evm_ops = {

	.hw_params = am3517evm_hw_params,

	.hw_params = am3517evm_hw_params,

};

};