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Commit fbcb4412 authored by Dirk Behme's avatar Dirk Behme Committed by Shawn Guo
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ARM: i.MX6: clk: add different DualLite MLB clock config 



The CCM_CBCMR register (address 0x02C4018) has different meaning
between the i.MX6 Quad/Dual and the i.MX6 Solo/DualLite.

Compared to the i.MX6 Quad/Dual, the CCM_CBCMR register in the
i.MX6 Solo/DualLite reuses the gpu2d_core bits for the MLB clock
configuration.

Signed-off-by: default avatarDirk Behme <dirk.behme@gmail.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent beb2d1c1

arch/arm/mach-imx/clk-imx6q.c

+8 −1
Original line number Diff line number Diff line
@@ -505,6 +505,13 @@ int __init mx6q_clocks_init(void) 
	clk[ldb_di1]      = imx_clk_gate2("ldb_di1",       "ldb_di1_podf",      base + 0x74, 14);

	clk[ipu2_di1]     = imx_clk_gate2("ipu2_di1",      "ipu2_di1_sel",      base + 0x74, 10);

	clk[hsi_tx]       = imx_clk_gate2("hsi_tx",        "hsi_tx_podf",       base + 0x74, 16);

	if (cpu_is_imx6dl())

		/*

		 * The multiplexer and divider of the imx6q clock gpu2d get

		 * redefined/reused as mlb_sys_sel and mlb_sys_clk_podf on imx6dl.

		 */

		clk[mlb] = imx_clk_gate2("mlb",            "gpu2d_core_podf",   base + 0x74, 18);

	else

		clk[mlb] = imx_clk_gate2("mlb",            "axi",               base + 0x74, 18);

	clk[mmdc_ch0_axi] = imx_clk_gate2("mmdc_ch0_axi",  "mmdc_ch0_axi_podf", base + 0x74, 20);

	clk[mmdc_ch1_axi] = imx_clk_gate2("mmdc_ch1_axi",  "mmdc_ch1_axi_podf", base + 0x74, 22);