Merge "drm/msm/sde: update irq enable/disable APIs" (fba5b130) · Commits · e / devices / android_kernel_oneplus_sm7250

drivers/gpu/drm/msm/sde/sde_core_irq.c

+23 −34

Original line number	Diff line number	Diff line
		@@ -115,16 +115,17 @@ static int _sde_core_irq_enable(struct sde_kms *sde_kms, int irq_idx)

		SDE_EVT32(irq_idx,
		atomic_read(&sde_kms->irq_obj.enable_counts[irq_idx]));
		if (atomic_inc_return(&sde_kms->irq_obj.enable_counts[irq_idx]) == 1) {
		ret = sde_kms->hw_intr->ops.enable_irq(
		sde_kms->hw_intr,
		irq_idx);
		spin_lock_irqsave(&sde_kms->hw_intr->irq_lock, irq_flags);
		if (atomic_inc_return(&sde_kms->irq_obj.enable_counts[irq_idx]) == 1)
		ret = sde_kms->hw_intr->ops.enable_irq_nolock(
		sde_kms->hw_intr, irq_idx);
		spin_unlock_irqrestore(&sde_kms->hw_intr->irq_lock, irq_flags);
		if (ret)
		SDE_ERROR("Fail to enable IRQ for irq_idx:%d\n",
		irq_idx);
		SDE_ERROR("Fail to enable IRQ for irq_idx:%d\n", irq_idx);

		SDE_DEBUG("irq_idx=%d ret=%d\n", irq_idx, ret);

		if (atomic_read(&sde_kms->irq_obj.enable_counts[irq_idx]) == 1) {
		spin_lock_irqsave(&sde_kms->irq_obj.cb_lock, irq_flags);
		/* empty callback list but interrupt is enabled */
		if (list_empty(&sde_kms->irq_obj.irq_cb_tbl[irq_idx]))
		@@ -132,26 +133,18 @@ static int _sde_core_irq_enable(struct sde_kms *sde_kms, int irq_idx)
		irq_idx);
		spin_unlock_irqrestore(&sde_kms->irq_obj.cb_lock, irq_flags);
		}

		return ret;
		}

		int sde_core_irq_enable(struct sde_kms sde_kms, int irq_idxs, u32 irq_count)
		{
		int i, ret = 0, counts;
		int i, ret = 0;

		if (!sde_kms \|\| !irq_idxs \|\| !irq_count) {
		SDE_ERROR("invalid params\n");
		return -EINVAL;
		}

		counts = atomic_read(&sde_kms->irq_obj.enable_counts[irq_idxs[0]]);
		if (counts) {
		SDE_ERROR("%pS: irq_idx=%d enable_count=%d\n",
		__builtin_return_address(0), irq_idxs[0], counts);
		SDE_EVT32(irq_idxs[0], counts, SDE_EVTLOG_ERROR);
		}

		for (i = 0; (i < irq_count) && !ret; i++)
		ret = _sde_core_irq_enable(sde_kms, irq_idxs[i]);

		@@ -166,6 +159,7 @@ int sde_core_irq_enable(struct sde_kms sde_kms, int irq_idxs, u32 irq_count)
		static int _sde_core_irq_disable(struct sde_kms *sde_kms, int irq_idx)
		{
		int ret = 0;
		unsigned long irq_flags;

		if (!sde_kms \|\| !sde_kms->hw_intr \|\| !sde_kms->irq_obj.enable_counts) {
		SDE_ERROR("invalid params\n");
		@@ -182,35 +176,30 @@ static int _sde_core_irq_disable(struct sde_kms *sde_kms, int irq_idx)

		SDE_EVT32(irq_idx,
		atomic_read(&sde_kms->irq_obj.enable_counts[irq_idx]));
		if (atomic_dec_return(&sde_kms->irq_obj.enable_counts[irq_idx]) == 0) {
		ret = sde_kms->hw_intr->ops.disable_irq(
		sde_kms->hw_intr,
		irq_idx);

		spin_lock_irqsave(&sde_kms->hw_intr->irq_lock, irq_flags);
		if (atomic_add_unless(&sde_kms->irq_obj.enable_counts[irq_idx], -1, 0)
		&& atomic_read(&sde_kms->irq_obj.enable_counts[irq_idx]) == 0)
		ret = sde_kms->hw_intr->ops.disable_irq_nolock(
		sde_kms->hw_intr, irq_idx);
		spin_unlock_irqrestore(&sde_kms->hw_intr->irq_lock, irq_flags);

		if (ret)
		SDE_ERROR("Fail to disable IRQ for irq_idx:%d\n",
		irq_idx);
		SDE_ERROR("Fail to disable IRQ for irq_idx:%d\n", irq_idx);
		SDE_DEBUG("irq_idx=%d ret=%d\n", irq_idx, ret);
		}

		return ret;
		}

		int sde_core_irq_disable(struct sde_kms sde_kms, int irq_idxs, u32 irq_count)
		{
		int i, ret = 0, counts;
		int i, ret = 0;

		if (!sde_kms \|\| !irq_idxs \|\| !irq_count) {
		SDE_ERROR("invalid params\n");
		return -EINVAL;
		}

		counts = atomic_read(&sde_kms->irq_obj.enable_counts[irq_idxs[0]]);
		if (counts == 2) {
		SDE_ERROR("%pS: irq_idx=%d enable_count=%d\n",
		__builtin_return_address(0), irq_idxs[0], counts);
		SDE_EVT32(irq_idxs[0], counts, SDE_EVTLOG_ERROR);
		}

		for (i = 0; (i < irq_count) && !ret; i++)
		ret = _sde_core_irq_disable(sde_kms, irq_idxs[i]);

drivers/gpu/drm/msm/sde/sde_hw_interrupts.c

+2 −25

Original line number	Diff line number	Diff line
		@@ -660,10 +660,9 @@ static void sde_hw_intr_dispatch_irq(struct sde_hw_intr *intr,
		spin_unlock_irqrestore(&intr->irq_lock, irq_flags);
		}

		static int sde_hw_intr_enable_irq(struct sde_hw_intr *intr, int irq_idx)
		static int sde_hw_intr_enable_irq_nolock(struct sde_hw_intr *intr, int irq_idx)
		{
		int reg_idx;
		unsigned long irq_flags;
		const struct sde_intr_reg *reg;
		const struct sde_irq_type *irq;
		const char *dbgstr = NULL;
		@@ -686,7 +685,6 @@ static int sde_hw_intr_enable_irq(struct sde_hw_intr *intr, int irq_idx)

		reg = &intr->sde_irq_tbl[reg_idx];

		spin_lock_irqsave(&intr->irq_lock, irq_flags);
		cache_irq_mask = intr->cache_irq_mask[reg_idx];
		if (cache_irq_mask & irq->irq_mask) {
		dbgstr = "SDE IRQ already set:";
		@@ -704,7 +702,6 @@ static int sde_hw_intr_enable_irq(struct sde_hw_intr *intr, int irq_idx)

		intr->cache_irq_mask[reg_idx] = cache_irq_mask;
		}
		spin_unlock_irqrestore(&intr->irq_lock, irq_flags);

		pr_debug("%s MASK:0x%.8x, CACHE-MASK:0x%.8x\n", dbgstr,
		irq->irq_mask, cache_irq_mask);
		@@ -761,25 +758,6 @@ static int sde_hw_intr_disable_irq_nolock(struct sde_hw_intr *intr, int irq_idx)
		return 0;
		}

		static int sde_hw_intr_disable_irq(struct sde_hw_intr *intr, int irq_idx)
		{
		unsigned long irq_flags;

		if (!intr)
		return -EINVAL;

		if (irq_idx < 0 \|\| irq_idx >= intr->sde_irq_map_size) {
		pr_err("invalid IRQ index: [%d]\n", irq_idx);
		return -EINVAL;
		}

		spin_lock_irqsave(&intr->irq_lock, irq_flags);
		sde_hw_intr_disable_irq_nolock(intr, irq_idx);
		spin_unlock_irqrestore(&intr->irq_lock, irq_flags);

		return 0;
		}

		static int sde_hw_intr_clear_irqs(struct sde_hw_intr *intr)
		{
		int i;
		@@ -1040,8 +1018,7 @@ static void __setup_intr_ops(struct sde_hw_intr_ops *ops)
		{
		ops->set_mask = sde_hw_intr_set_mask;
		ops->irq_idx_lookup = sde_hw_intr_irqidx_lookup;
		ops->enable_irq = sde_hw_intr_enable_irq;
		ops->disable_irq = sde_hw_intr_disable_irq;
		ops->enable_irq_nolock = sde_hw_intr_enable_irq_nolock;
		ops->disable_irq_nolock = sde_hw_intr_disable_irq_nolock;
		ops->dispatch_irqs = sde_hw_intr_dispatch_irq;
		ops->clear_all_irqs = sde_hw_intr_clear_irqs;

drivers/gpu/drm/msm/sde/sde_hw_interrupts.h

+2 −12

Original line number	Diff line number	Diff line
		@@ -128,22 +128,12 @@ struct sde_hw_intr_ops {
		u32 instance_idx);

		/**
		* enable_irq - Enable IRQ based on lookup IRQ index
		* enable_irq_nolock - Enable IRQ based on lookup IRQ index without lock
		* @intr: HW interrupt handle
		* @irq_idx: Lookup irq index return from irq_idx_lookup
		* @return: 0 for success, otherwise failure
		*/
		int (*enable_irq)(
		struct sde_hw_intr *intr,
		int irq_idx);

		/**
		* disable_irq - Disable IRQ based on lookup IRQ index
		* @intr: HW interrupt handle
		* @irq_idx: Lookup irq index return from irq_idx_lookup
		* @return: 0 for success, otherwise failure
		*/
		int (*disable_irq)(
		int (*enable_irq_nolock)(
		struct sde_hw_intr *intr,
		int irq_idx);