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Commit fb8e863f authored by Lynus Vaz's avatar Lynus Vaz Committed by Gerrit - the friendly Code Review server
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msm: kgsl: Ioremap the CX_MISC GPU block registers 



The CX_MISC GPU block is used for a few configuration settings.
Ioremap this block so it can be used by the driver.

Change-Id: If9a5681c076207098ebd8beea770bad5cfdfe903
Signed-off-by: default avatarLynus Vaz <lvaz@codeaurora.org>
parent 0a1727aa

drivers/gpu/msm/adreno.c

+67 −0
Original line number Diff line number Diff line
@@ -1193,6 +1193,22 @@ static void adreno_cx_dbgc_probe(struct kgsl_device *device) 
		dev_warn(device->dev, "cx_dbgc ioremap failed\n");

}



static void adreno_cx_misc_probe(struct kgsl_device *device)

{

	struct adreno_device *adreno_dev = ADRENO_DEVICE(device);

	struct resource *res;



	res = platform_get_resource_byname(device->pdev, IORESOURCE_MEM,

					   "cx_misc");



	if (res == NULL)

		return;



	adreno_dev->cx_misc_len = resource_size(res);

	adreno_dev->cx_misc_virt = devm_ioremap(device->dev,

					res->start, adreno_dev->cx_misc_len);

}



static void adreno_efuse_read_soc_hw_rev(struct adreno_device *adreno_dev)

{

	unsigned int val;
@@ -1315,6 +1331,9 @@ static int adreno_probe(struct platform_device *pdev) 
	/* Probe for the optional CX_DBGC block */

	adreno_cx_dbgc_probe(device);



	/* Probe for the optional CX_MISC block */

	adreno_cx_misc_probe(device);



	/*

	 * qcom,iommu-secure-id is used to identify MMUs that can handle secure

	 * content but that is only part of the story - the GPU also has to be
@@ -3155,6 +3174,54 @@ void adreno_cx_dbgc_regwrite(struct kgsl_device *device, 
	__raw_writel(value, adreno_dev->cx_dbgc_virt + cx_dbgc_offset);

}



void adreno_cx_misc_regread(struct adreno_device *adreno_dev,

	unsigned int offsetwords, unsigned int *value)

{

	unsigned int cx_misc_offset;



	cx_misc_offset = (offsetwords << 2);

	if (!adreno_dev->cx_misc_virt ||

		(cx_misc_offset >= adreno_dev->cx_misc_len))

		return;



	*value = __raw_readl(adreno_dev->cx_misc_virt + cx_misc_offset);



	/*

	 * ensure this read finishes before the next one.

	 * i.e. act like normal readl()

	 */

	rmb();

}



void adreno_cx_misc_regwrite(struct adreno_device *adreno_dev,

	unsigned int offsetwords, unsigned int value)

{

	unsigned int cx_misc_offset;



	cx_misc_offset = (offsetwords << 2);

	if (!adreno_dev->cx_misc_virt ||

		(cx_misc_offset >= adreno_dev->cx_misc_len))

		return;



	/*

	 * ensure previous writes post before this one,

	 * i.e. act like normal writel()

	 */

	wmb();

	__raw_writel(value, adreno_dev->cx_misc_virt + cx_misc_offset);

}



void adreno_cx_misc_regrmw(struct adreno_device *adreno_dev,

		unsigned int offsetwords,

		unsigned int mask, unsigned int bits)

{

	unsigned int val = 0;



	adreno_cx_misc_regread(adreno_dev, offsetwords, &val);

	val &= ~mask;

	adreno_cx_misc_regwrite(adreno_dev, offsetwords, val | bits);

}



/**

 * adreno_waittimestamp - sleep while waiting for the specified timestamp

 * @device - pointer to a KGSL device structure

drivers/gpu/msm/adreno.h

+12 −0
Original line number Diff line number Diff line
@@ -431,6 +431,8 @@ enum gpu_coresight_sources { 
 * @chipid: Chip ID specific to the GPU

 * @gmem_base: Base physical address of GMEM

 * @gmem_size: GMEM size

 * @cx_misc_len: Length of the CX MISC register block

 * @cx_misc_virt: Pointer where the CX MISC block is mapped

 * @gpucore: Pointer to the adreno_gpu_core structure

 * @pfp_fw: Buffer which holds the pfp ucode

 * @pfp_fw_size: Size of pfp ucode buffer
@@ -511,6 +513,8 @@ struct adreno_device { 
	unsigned long cx_dbgc_base;

	unsigned int cx_dbgc_len;

	void __iomem *cx_dbgc_virt;

	unsigned int cx_misc_len;

	void __iomem *cx_misc_virt;

	const struct adreno_gpu_core *gpucore;

	struct adreno_firmware fw[2];

	size_t gpmu_cmds_size;
@@ -1163,6 +1167,14 @@ void adreno_cx_dbgc_regread(struct kgsl_device *adreno_device, 
		unsigned int offsetwords, unsigned int *value);

void adreno_cx_dbgc_regwrite(struct kgsl_device *device,

		unsigned int offsetwords, unsigned int value);

void adreno_cx_misc_regread(struct adreno_device *adreno_dev,

		unsigned int offsetwords, unsigned int *value);

void adreno_cx_misc_regwrite(struct adreno_device *adreno_dev,

		unsigned int offsetwords, unsigned int value);

void adreno_cx_misc_regrmw(struct adreno_device *adreno_dev,

		unsigned int offsetwords,

		unsigned int mask, unsigned int bits);





#define ADRENO_TARGET(_name, _id) \

static inline int adreno_is_##_name(struct adreno_device *adreno_dev) \