Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit fa4f53c4 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
Browse files

drm/i915: Implement WaVcpClkGateDisableForMediaReset:ctg, elk 



Apparently we need to disable VCP unit clock gating around media reset
on g4x.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 80715b2f

drivers/gpu/drm/i915/i915_reg.h

+4 −0
Original line number Diff line number Diff line
@@ -1835,6 +1835,10 @@ enum punit_power_well { 
#define VF_UNIT_CLOCK_GATE_DISABLE		(1 << 9)

#define GS_UNIT_CLOCK_GATE_DISABLE		(1 << 7)

#define CL_UNIT_CLOCK_GATE_DISABLE		(1 << 6)



#define VDECCLK_GATE_D		0x620C		/* g4x only */

#define  VCP_UNIT_CLOCK_GATE_DISABLE		(1 << 4)



#define RAMCLK_GATE_D		0x6210		/* CRL only */

#define DEUC			0x6214          /* CRL only */

drivers/gpu/drm/i915/intel_uncore.c

+35 −1
Original line number Diff line number Diff line
@@ -988,6 +988,36 @@ static int i965_do_reset(struct drm_device *dev) 
	return 0;

}



static int g4x_do_reset(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	int ret;



	pci_write_config_byte(dev->pdev, I965_GDRST,

			      GRDOM_RENDER | GRDOM_RESET_ENABLE);

	ret =  wait_for(i965_reset_complete(dev), 500);

	if (ret)

		return ret;



	/* WaVcpClkGateDisableForMediaReset:ctg,elk */

	I915_WRITE(VDECCLK_GATE_D, I915_READ(VDECCLK_GATE_D) | VCP_UNIT_CLOCK_GATE_DISABLE);

	POSTING_READ(VDECCLK_GATE_D);



	pci_write_config_byte(dev->pdev, I965_GDRST,

			      GRDOM_MEDIA | GRDOM_RESET_ENABLE);

	ret =  wait_for(i965_reset_complete(dev), 500);

	if (ret)

		return ret;



	/* WaVcpClkGateDisableForMediaReset:ctg,elk */

	I915_WRITE(VDECCLK_GATE_D, I915_READ(VDECCLK_GATE_D) & ~VCP_UNIT_CLOCK_GATE_DISABLE);

	POSTING_READ(VDECCLK_GATE_D);



	pci_write_config_byte(dev->pdev, I965_GDRST, 0);



	return 0;

}



static int ironlake_do_reset(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1040,7 +1070,11 @@ int intel_gpu_reset(struct drm_device *dev) 
	case 7:

	case 6: return gen6_do_reset(dev);

	case 5: return ironlake_do_reset(dev);

	case 4: return i965_do_reset(dev);

	case 4:

		if (IS_G4X(dev))

			return g4x_do_reset(dev);

		else

			return i965_do_reset(dev);

	default: return -ENODEV;

	}

}