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Commit f980d127 authored by Feifei Xu's avatar Feifei Xu Committed by Alex Deucher
Browse files

drm/amdgpu/soc15: Set common clockgating for vega20. 



Same as vega10 for now.

Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarFeifei Xu <Feifei.Xu@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 935be7a0

drivers/gpu/drm/amd/amdgpu/soc15.c

+1 −0
Original line number Diff line number Diff line
@@ -875,6 +875,7 @@ static int soc15_common_set_clockgating_state(void *handle, 
	switch (adev->asic_type) {

	case CHIP_VEGA10:

	case CHIP_VEGA12:

	case CHIP_VEGA20:

		adev->nbio_funcs->update_medium_grain_clock_gating(adev,

				state == AMD_CG_STATE_GATE ? true : false);

		adev->nbio_funcs->update_medium_grain_light_sleep(adev,