Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f86a9c1c authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Configure APQ platform type for Kona"

parents 5840739f f8dcdbff

arch/arm64/boot/dts/qcom/kona-rumi.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -118,6 +118,10 @@ 
	};

};



&ipa_hw {

	qcom,ipa-hw-mode = <1>; /* IPA hw type =  Virtual */

};



&mhi_0 {

	mhi,timeout = <10000>;

arch/arm64/boot/dts/qcom/kona.dtsi

+97 −0
Original line number Diff line number Diff line
@@ -1292,6 +1292,103 @@ 
		};

	};



	qcom,msm_gsi {

		compatible = "qcom,msm_gsi";

	};



	qcom,rmnet-ipa {

		compatible = "qcom,rmnet-ipa3";

		qcom,rmnet-ipa-ssr;

		qcom,ipa-advertise-sg-support;

		qcom,ipa-napi-enable;

	};



	qcom,ipa_fws {

		compatible = "qcom,pil-tz-generic";

		qcom,pas-id = <0xf>;

		qcom,firmware-name = "ipa_fws";

		qcom,pil-force-shutdown;

		memory-region = <&pil_ipa_fw_mem>;

	};



	ipa_hw: qcom,ipa@1e00000 {

		compatible = "qcom,ipa";

		reg =

			<0x1e00000 0x84000>,

			<0x1e04000 0x23000>;

		reg-names = "ipa-base", "gsi-base";

		interrupts =

			<0 311 IRQ_TYPE_LEVEL_HIGH>,

			<0 432 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "ipa-irq", "gsi-irq";

		qcom,ipa-hw-ver = <17>; /* IPA core version = IPAv4.5 */

		qcom,ipa-hw-mode = <0>;

		qcom,platform-type = <2>; /* APQ platform */

		qcom,ee = <0>;

		qcom,use-ipa-tethering-bridge;

		qcom,mhi-event-ring-id-limits = <9 11>; /* start and end */

		qcom,modem-cfg-emb-pipe-flt;

		qcom,use-ipa-pm;

		qcom,bandwidth-vote-for-ipa;

		qcom,use-64-bit-dma-mask;

		qcom,msm-bus,name = "ipa";

		qcom,msm-bus,num-cases = <5>;

		qcom,msm-bus,num-paths = <4>;

		qcom,msm-bus,vectors-KBps =

		/* No vote */

		<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 0 0>,

		<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 0 0>,

		<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 0 0>,

		<MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 0>,



		/* SVS2 */

		<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 80000 600000>,

		<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 80000 350000>,

		<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 40000 40000>,

		<MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 125>,



		/* SVS */

		<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 80000 640000>,

		<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 80000 640000>,

		<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 80000 80000>,

		<MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 250>,



		/* NOMINAL */

		<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 206000 960000>,

		<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 206000 960000>,

		<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 206000 160000>,

		<MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 500>,



		/* TURBO */

		<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 206000 3600000>,

		<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 206000 3600000>,

		<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 206000 300000>,

		<MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 600>;



		qcom,bus-vector-names = "MIN", "SVS2", "SVS", "NOMINAL",

			"TURBO";

		qcom,throughput-threshold = <310 600 1000>;

		qcom,scaling-exceptions = <>;

	};



	ipa_smmu_ap: ipa_smmu_ap {

		compatible = "qcom,ipa-smmu-ap-cb";

		iommus = <&apps_smmu 0x5C0 0x0>;

		qcom,iommu-dma = "bypass";

	};



	ipa_smmu_wlan: ipa_smmu_wlan {

		compatible = "qcom,ipa-smmu-wlan-cb";

		iommus = <&apps_smmu 0x5C1 0x0>;

		qcom,iommu-dma = "bypass";

	};



	ipa_smmu_uc: ipa_smmu_uc {

		compatible = "qcom,ipa-smmu-uc-cb";

		iommus = <&apps_smmu 0x5C2 0x0>;

		qcom,iommu-dma = "bypass";

	};



	qcom,glink {

		compatible = "qcom,glink";

		#address-cells = <1>;